Spare substitution in memory system

A non-transitory computer-readable medium storing code comprising instructions which, when executed by one or more processors of an electronic device, cause the electronic device to:

• identify an access command for a memory device;
• generate a code word for the access command, the code word comprising a plurality of fields;
• group bits of the code word into a plurality of groups, wherein bits of a first field of the plurality of fields are included in at least two of the plurality of groups and bits of one or more second fields of the plurality of fields are included in at least a group of the plurality of groups, wherein each group of bits corresponds to one of a plurality of arrangements of fields, the plurality of arrangements of fields comprising a first arrangement of fields associated with the at least the group and comprising a set of error control bits associated with an error control operation for the bits of the first field;
• and
• transfer, to the memory device for the access command, the plurality of groups over a plurality of channels in a plurality of bursts according to the plurality of arrangements of fields, wherein each respective set of groups of the plurality of groups is transferred over a respective channel of the plurality of channels, and wherein each group of the respective set of groups for a channel is transferred in a respective burst of the plurality of bursts, wherein the at least the group is distributed across more than one of the respective sets of groups.

An apparatus, comprising:

• means for identifying an access command for a memory device;
• means for generating a code word for the access command, the code word comprising a plurality of fields;
• means for grouping bits of the code word into a plurality of groups, wherein bits of a first field of the plurality of fields are included in at least two of the plurality of groups and bits of one or more second fields of the plurality of fields are included in at least a group of the plurality of groups, wherein each group of bits corresponds to one of a plurality of arrangements of fields, the plurality of arrangements of fields comprising a first arrangement of fields associated with the at least the group and comprising a set of error control bits associated with an error control operation for the bits of the first field;
• and
• means for transferring, to the memory device for the access command, the plurality of groups over a plurality of channels in a plurality of bursts according to the plurality of arrangements of fields, wherein each respective set of groups of the plurality of groups is transferred over a respective channel of the plurality of channels, and wherein each group of the respective set of groups for a channel is transferred in a respective burst of the plurality of bursts, wherein the at least the group is distributed across more than one of the respective sets of groups.