Parity data in dynamic random access memory (dram)
AssigneeMicron Technology, Inc.
InventorsSai Krishna Mylavarapu, Todd A. Marquart
Life of this patent
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Abstract
Methods, devices, and systems related to storing parity data in dynamic random access memory (DRAM) are described. In an example, a method can include generating, at a controller, parity data based on user data queued for writing to a non-volatile memory device, receiving the parity data at a DRAM device from the controller and writing the parity data to the DRAM device, receiving the user data at a non-volatile memory device from the controller and writing the user data to the non-volatile memory device, reading the user data from the non-volatile memory device via the controller, and receiving the parity data at the controller from the DRAM device.
Claims20
A method, comprising:
- receiving user data from a non-volatile memory device at a controller of a dual in-line memory module (DIMM);
- receiving parity data corresponding to the user data from a dynamic random access memory (DRAM) device at the controller;
- and
- reconstructing the user data at the controller using the parity data.
A dual in-line memory module (DIMM), comprising:
- a dynamic random access memory (DRAM) device;
- a non-volatile memory device coupled to the DRAM device, wherein the non-volatile memory device is configured to store user data;
- and
- a controller coupled to the DRAM device and the non-volatile memory device, wherein the controller is configured to:
- receive the user data from the non-volatile memory device;
- and
- perform an error correction code (ECC) operation on the user data to regenerate parity data.
A dual in-line memory module (DIMM), comprising:
- a controller configured to generate parity data based on user data;
- a dynamic random access memory (DRAM) device configured to store the parity data;
- and
- a non-volatile memory device configured to store the parity data prior to powering off the DRAM device;
- and
- wherein the controller is configured to rewrite the parity data to the DRAM device in response to powering on the DRAM device.
Dependencies are inferred from the claim text.