US 2024/0402941 A1 · MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME, AND OPERATING METHOD OF THE MEMORY DEVICE

Abstract

A memory device includes first and second memory cell arrays each including a plurality of memory cells, a page buffer circuit configured to read first soft decision data including a plurality of sub-segments from the first memory cell array, and a compression circuit configured to perform a first compression operation of generating a first compression segment including a number of position values less than or equal to a first reference number, on each of a plurality of partial segments included in one of the plurality of sub-segments and sequentially perform a plurality of compression operations, which is subsequent to the first compression operation, of generating a next compression segment including a number of position values, which are less than or equal to a reference number corresponding to each compression operation, of position values included in two or more previous compression segments in each compression operation.

Claims20

Dependent claims

A memory device comprising:

first and second memory cell arrays, each including a plurality of memory cells;
a page buffer circuit configured to read first soft decision data including a plurality of sub-segments from the first memory cell array;
and
a compression circuit configured to perform, for each of a plurality of partial segments included in one of the plurality of sub-segments, a first compression operation of generating a first compression segment including a number of position values, which are less than or equal to a first reference number, among position values representing a position of a bit having a first value on the one of the plurality of sub-segments, and sequentially perform a plurality of compression operations, which are subsequent to the first compression operation, of generating, in each of the plurality of compression operations, a next compression segment including a number of position values, which are less than or equal to a reference number corresponding to each of the plurality of compression operations, of position values included in two or more previous compression segments.

1 more element

An operating method of a memory device, the operating method comprising:

reading soft decision data including a plurality of sub-segments from a first memory cell array;
obtaining, for each of a plurality of partial segments included in one of the plurality of sub-segments, position values representing a position of a bit having a first value on the one of the plurality of sub-segments;
performing, for each of the plurality of partial segments, a first compression operation of generating a first compression segment which has a first size, selectively includes a dummy value, and includes a number of position values, which is less than or equal to a first reference number, of corresponding position values;
sequentially performing a plurality of compression operations subsequent to the first compression operation, by, in the each of the plurality of compression operations, combining position values included in two or more previous compression segments to generate a next compression segment, having a size corresponding to each compression operation and including a number of position values which are less than or equal to a reference number corresponding to each of the plurality of compression operations;
and
providing a memory controller with a compression segment generated in a last compression operation of the plurality of compression operations.

3 more elements

A memory system comprising:

a memory device configured to read hard decision data and soft decision data included in a plurality of sub-segments from a memory cell array, perform, for each of a plurality of partial segments included in one of the plurality of sub-segments, a first compression operation of generating a first compression segment including a number of position values, which are less than or equal to a first reference number, among position values representing a position of a bit having a first value on the one of the plurality of sub-segments, and sequentially perform a plurality of compression operations, which is subsequent to the first compression operation, of generating, in each of the plurality of compression operations, a next compression segment including a number of position values, which are less than or equal to a reference number corresponding to each of the plurality of compression operations, of position values included in two or more previous compression segments;
and
a memory controller configured to receive a second compression segment generated by a last compression operation of the plurality of compression operations and obtain a decompression sub-segment corresponding to the one of the plurality of sub-segments, based on position values included in the second compression segment.

Dependencies are inferred from the claim text.

Memory device, memory system including the same, and operating method of the memory device

Life of this patent

Memory device, memory system including the same, and operating method of the memory device

Life of this patent

Abstract

Claims20