Memory device including a plurality of pads and method of detecting crack of pads thereof

A method of detecting cracks in a memory device, the method comprising:

• transmitting a test command from a test device to the memory device;
• generating a test pulse signal based on the test command;
• transmitting the test pulse signal through a crack detection structure arranged below a test target pad;
• outputting a delay pulse signal which has passed through the crack detection structure to the test device through a data pad of the memory device;
• and
• comparing the test pulse signal and the delay pulse signal to determine whether the test target pad contains a crack based on a delay of the delay pulse signal.

A memory device comprising:

• test target pads;
• a test logic configured to generate a test pulse signal based on a test command received from an external device;
• a crack detection structure arranged below the test target pads and including lines connected in series across the test target pads;
• and
• a crack detection circuit configured to determine whether cracks occur in the test target pads based on a delay of a delay pulse signal changed when the test pulse signal passes through the crack detection structure.