Method for fabricating embedded silicon photonics chip in a multi-die package
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorJen-Yuan Chang
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorJen-Yuan Chang
Estimating the term…
A method includes: providing a base substrate structure having a top surface and conductive regions disposed in a dielectric region at the top surface, the conductive regions being electrically connected to an interconnect structure; forming a first die having a first surface and a second surface, forming the first die comprising: forming a photonic device on a first substrate of the first die; forming a first interconnect structure; forming a second interconnect structure at a side surface of the first die; and removing a portion of the first substrate from a back side of the first die to expose a waveguide section at the second surface of the first die; and bonding the first die sideways to the base substrate structure, wherein the side surface of the first die is bonded to the top surface of the base substrate structure.
A method of fabricating a semiconductor package, comprising:
A method comprising:
A method comprising:
Dependencies are inferred from the claim text.