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US 2024/0387652 A1Published application
Integrated circuit including backside conductive vias
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChung-Liang CHENG
Life of this patent
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Abstract
An integrated circuit includes a first chip bonded to a second chip. The first chip includes gate all around transistors on a substrate. The first chip includes backside conductive vias extending through the substrate to the gate all around transistors. The second chip includes electronic circuitry electrically connected to the transistors by the backside conductive vias.
Claims20
A method, comprising:
- forming, in a first chip, a first gate all around transistor having a first source/drain region;
- forming, in the first chip, a second gate all around transistor having a second source/drain region;
- and
- forming a backside conductive via extending through the substrate to the first source/drain region and the second source/drain region.
1 more element
A method, comprising:
- forming a first gate all around transistor on a semiconductor substrate in a first wafer, wherein the semiconductor substrate includes a first semiconductor layer, an etch-stop layer on the first semiconductor layer, and a second semiconductor layer on the etch-stop layer;
- forming a backside conductive via extending through the semiconductor substrate to a source region of the first gate all around transistor;
- and
- bonding a second wafer to the semiconductor substrate.
1 more element
A method, comprising:
- forming a first gate all around transistor on a semiconductor substrate in a first wafer;
- removing the semiconductor substrate;
- depositing a dielectric layer in place of the semiconductor substrate;
- and
- forming a backside conductive via through the dielectric layer and contacting a source region of the first gate all around transistor.
2 more elements
Dependencies are inferred from the claim text.