Arched membrane structure for mems device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJhao-Yi Wang, Chin-Yu Ku, Wen-Hsiung Lu, Lung-Kai Mao, Ming-Da Cheng
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Abstract
A method includes bonding a supporting substrate to a semiconductor substrate of a wafer. A bonding layer is between, and is bonded to both of, the supporting substrate and the semiconductor substrate. A first etching process is performed to etch the supporting substrate and to form an opening, which penetrates through the supporting substrate and stops on the bonding layer. The opening has substantially straight edges. The bonding layer is then etched. A second etching process is performed to extend the opening down into the semiconductor substrate. A bottom portion of the opening is curved.
Claims21
(canceled)
A device comprising:
- a semiconductor substrate comprising a top surface and a curved bottom surface;
- a plurality of dielectric layers over the top surface of the semiconductor substrate;
- a plurality of metal lines and vias in the plurality of dielectric layers;
- and
- a plurality of conductive pipes in the plurality of dielectric layers and the semiconductor substrate, wherein the plurality of conductive pipes comprise:
- top ends higher than the top surface of the semiconductor substrate;
- and
- bottom ends level with the curved bottom surface of the semiconductor substrate.
A device comprising:
- a semiconductor substrate;
- a first opening extending from a bottom surface of the semiconductor substrate upwardly into the semiconductor substrate;
- a second opening over and joined with the first opening, wherein the second opening is laterally narrower the first opening;
- a plurality of dielectric layers over the semiconductor substrate, wherein a portion of the second opening is in the semiconductor substrate and the plurality of dielectric layers;
- and
- integrated circuit devices at a top surface of the semiconductor substrate.
A device comprising:
- a device die comprising:
- a semiconductor substrate;
- integrated circuit devices at a top surface of the semiconductor substrate;
- and
- a plurality of dielectric layers over the semiconductor substrate, wherein portions of the semiconductor substrate and the plurality of dielectric layers form a membrane configured to vibrate, and wherein edge portions of the membrane are increasingly thicker than respective middle portions of the membrane, and wherein a bottom surface of the membrane comprises a curved portion;
- and
- a dielectric bonding layer underlying and joined to the semiconductor substrate.
Dependencies are inferred from the claim text.