Isolated digital input receiver with sink and source mode support

A circuit, comprising:

• a sink/source mode detector having an input terminal and an output terminal, the input terminal of the sink/source mode detector coupled to a first input/output (I/O) terminal of the circuit, the sink/source mode detector configured to:
• compare a voltage provided at the first I/O terminal of the circuit to a first reference signal;
• determine, responsive to the voltage provided at the first I/O terminal exceeding the first reference signal, that the circuit is in a source mode;
• determine, responsive to the voltage provided at the first I/O terminal not exceeding the first reference signal, that the circuit is in a sink mode;
• responsive to determining that the circuit is in the source mode and an input signal of the circuit has a value less than a second reference signal, control a first switch to form a first current path between a voltage supply terminal and the first I/O terminal of the circuit;
• and
• responsive to determining that the circuit is in the sink mode and the input signal has a value greater than the second reference signal, control a second switch to form a second current path between a ground terminal and the first I/O terminal of the circuit.

A system, comprising:

• an isolated input circuit having first and second reference input terminals;
• first and second input/output (I/O) terminals;
• and an output terminal;
• a first light emitting diode (LED) having an anode and a cathode, the anode of the first LED coupled to the second I/O terminal and the cathode of the first LED coupled to a first supply terminal;
• a second LED having an anode and a cathode, the cathode of the second LED coupled to the second I/O terminal and the anode of the second LED coupled to the first supply terminal;
• a resistor having first and second terminals, the first terminal of the resistor coupled to a second supply terminal;
• a first diode having an anode and a cathode, the anode of the first diode coupled to the second terminal of the resistor, and the cathode of the first diode coupled to the first reference input terminal;
• a second diode having an anode and a cathode, the anode of the second diode coupled to the second reference input terminal, and the cathode of the second diode coupled to the second supply terminal;
• a third diode having an anode and a cathode, the anode of the third diode coupled to the second reference input terminal, and the cathode of the third diode coupled to the second terminal of the resistor;
• and
• a fourth diode having an anode and a cathode, the anode of the fourth diode coupled to the second supply terminal, and the cathode of the fourth diode coupled to the first reference input terminal.