Method and apparatus of generating drive signal for light emitting element
AssigneeBarco N.V.
InventorsPatrick Albin WILLEM, Wim VAN EESSEN
Life of this patent
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Abstract
A method for generating a drive signal for driving a light emitting element of a display. The method includes: dividing the M bits into M−N1+1 data ranges, each including N1 consecutive bits of the M bits; determining N2 bits for uniquely identifying the M−N1+1 data ranges; generating a coded signal of N1+N2 bits for representing the M bits of the input signal; based on the coded signal, generating the drive signal comprising a sequence of N1 bits, each bit of said sequence of N1 bits controlling a current through the light emitting element or a voltage across the light emitting element, during a time interval, one bit at a time.
Claims23
A method for generating a drive signal for driving a light emitting element of a display, the method comprising:
- receiving an input data comprising M bits, b0, b1, . . . , bM−1, for driving the light emitting element, wherein each bit has a value of 0 or 1;
- dividing the M bits into M−N1+1 data ranges, each comprising N1 consecutive bits of the M bits, wherein N1<M;
- determining N2 bits for uniquely identifying the M−N1+1 data ranges;
- generating a coded signal for representing the M bits of the input signal, wherein the coded signal comprises N1+N2 bits,
- a first part of the coded signal comprising N2 bits for identifying one of the M−N1+1 data ranges, and
- a second part of the coded signal comprising N1 bits being the N1 consecutive bits bi, . . . , bi+N1−1, of said identified data range, wherein N1+N2<M, i>=0, i+N1−1<=M−1;
- based on the coded signal, generating the drive signal comprising a sequence of N1 bits, each bit of said sequence of N1 bits controlling a current through the light emitting element or a voltage across the light emitting element, during a time interval, one bit at a time;
- wherein M, N1, N2 and i are natural numbers.
(canceled)
An apparatus for generating a drive signal for driving a light emitting element of a display, the apparatus comprising:
- a processing circuit configured to:
- divide an input data comprising M bits, b0, b1, . . . , bM−1, for driving the light emitting element into M−N1+1 data ranges, each comprising N1 consecutive bits of the M bits, wherein N1<M, wherein each bit has a value of 0 or 1;
- determine N2 bits for uniquely identifying the M−N1+1 data ranges;
- generate a coded signal for representing the M bits of the input signal, wherein the coded signal comprises N1+N2 bits,
- a first part of the coded signal comprising N2 bits for identifying one of the M−N1+1 data ranges, and
- a second part of the coded signal comprising N1 bits being the N1 consecutive bits bi, . . . , bi+N1−1, of said identified data range, wherein N1+N2<M, i>=0, i+N1−1<=M−1;
- based on the coded signal, generate the drive signal comprising a sequence of N1 bits, each bit of said sequence of N1 bits controlling a current through the light emitting element or a voltage across the light emitting element during a time interval, one bit at a time;
- wherein M, N1, N2 and i are natural numbers.
A driver circuit for driving a light emitting element of a display, the driver circuit comprising:
- a loading element for receiving a second part of a drive signal, and loading a second storage element with the second part of the drive signal;
- the second storage element for storing the second part of the drive signal;
- a control element having a first control electrode for controlling a current through the light emitting element or a voltage across the light emitting element;
- a first storage element for storing a first part of the drive signal, said drive signal being applied to the first control electrode of the control element;
- a transfer element having a second control electrode for loading the first storage element with the second part of the drive signal;
- a reset element for shunting the first storage element or the light emitting element, wherein the reset element is configured to be controlled by a reset signal RST_B and a reset flag, wherein the reset flag is configured to enable or disable the reset signal RST_B for each bit of the drive signal.
21-22. (canceled)
24-26. (canceled)
Dependencies are inferred from the claim text.