Systolic array including fused multiply accumulate with efficient prenormalization and extended dynamic range
AssigneeAmazon Technologies, Inc.
InventorThomas Elmer
Life of this patent
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Abstract
Systems and methods are provided to perform multiply-accumulate operations of at least one normalized number in a systolic array. The systolic array can obtain a first input and detect that the first input is denormal. Based on determining the first input is denormal, the systolic array can generate a first normalized number by normalizing the first input. Processing elements of the systolic array can include a multiplier and an adder. The multiplier can multiply the first normalized number by a second normal or normalized number to generate a multiplier product and the adder can add an input partial sum to the multiplier product to generate an addition result.
Claims20
A systolic circuit comprising:
- a systolic array comprising processing elements;
- and
- a normalizer configured to:
- receive a first input represented in floating-point with a first bit-length;
- receive a second input represented in floating-point with a second bit-length, wherein the second bit-length is greater than the first bit-length;
- and
- generate a first normalized number represented in floating-point with the second bit-length;
- wherein an individual processing element of the systolic array is configured to:
- perform one or more operations on the first normalized number to generate an output.
A method for systolic processing by a processing element in a systolic array of processing elements, the method comprising:
- obtaining, by a normalizer of the processing element, a first input represented in floating-point with a first bit-length;
- obtaining, by the normalizer, a second input represented in floating-point with a second bit-length;
- generating, by the normalizer, a first normal number represented in floating-point with the first bit-length;
- and
- performing, by the processing element, one or more operations on the first normal number to generate an output.
Non-transitory computer-readable media including computer-executable instructions that, when executed by a systolic circuit comprising a normalizer and an array of processing elements, cause the systolic circuit to:
- obtain, by the normalizer, a first input represented in floating-point with a first bit-length;
- obtain, by the normalizer, a second input represented in floating-point with a second bit-length;
- generate, by the normalizer, a first normal number represented in floating-point with the first bit-length;
- and
- perform, by a processing element of the array of processing elements, one or more operations on the first normal number to generate an output.
Dependencies are inferred from the claim text.