Mtjs with lithography-variation independent critical dimension
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorWilliam J. Gallagher
Life of this patent
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Abstract
Some examples relate to an integrated circuit. The integrated circuit comprises a semiconductor substrate, a bottom electrode over the substrate, a circular magnetic tunneling junction (MTJ) disposed over an upper surface of bottom electrode, and a circular top electrode disposed over an upper surface of the magnetic tunneling junction. The circular top electrode is concentric to the circular magnetic tunneling junction, and a diameter of the circular magnetic tunneling junction is smaller than 60 nm or smaller than 30 nm.
Claims20
An integrated circuit, comprising:
- a semiconductor substrate;
- a bottom electrode over the semiconductor substrate;
- a magnetic tunneling junction (MTJ) disposed over an upper surface of the bottom electrode, the MTJ including a first magnetic interlayer, a magnetic tunnel junction barrier layer over the first magnetic interlayer, and a second magnetic interlayer over the magnetic tunnel junction barrier layer, the magnetic tunnel junction barrier layer having a first width as measured between outer sidewalls of the magnetic tunnel junction barrier layer and the second magnetic interlayer having a second width as measured between outer sidewalls of the second magnetic interlayer, the second width being less than the first width;
- a sidewall spacer structure disposed on an upper surface of the magnetic tunnel junction barrier layer and having an inner sidewall that contacts the outer sidewalls of the second magnetic interlayer;
- and
- a top electrode disposed over an upper surface of the second magnetic interlayer.
An integrated circuit, comprising:
- a semiconductor substrate;
- a conductive bottom electrode over the semiconductor substrate;
- a circular magnetic tunneling junction disposed over an upper surface of the conductive bottom electrode, the circular MTJ including a first magnetic interlayer, a magnetic tunnel junction barrier layer over the first magnetic interlayer, and a second magnetic interlayer over the magnetic tunnel junction barrier layer, the magnetic tunnel junction barrier layer having a first width that is smaller than 60 nanometers (nm) as measured between outer sidewalls of the magnetic tunnel junction barrier layer and the second magnetic interlayer having a second width as measured between outer sidewalls of the second magnetic interlayer, the second width being less than the first width;
- a sidewall spacer structure disposed on an upper surface of the magnetic tunnel junction barrier layer and having an inner sidewall that contacts the outer sidewalls of the second magnetic interlayer;
- and
- a top electrode disposed over an upper surface of the second magnetic interlayer.
An integrated circuit, comprising:
- a semiconductor substrate;
- a conductive bottom electrode over the semiconductor substrate;
- a circular first magnetic interlayer disposed over the conductive bottom electrode;
- a circular magnetic tunnel junction barrier layer over the circular first magnetic interlayer, the circular magnetic tunnel junction barrier layer having a first diameter as measured between outer sidewalls of the circular magnetic tunnel junction barrier layer;
- a circular second magnetic interlayer over the circular magnetic tunnel junction barrier layer, and the circular second magnetic interlayer having a second diameter as measured between outer sidewalls of the circular second magnetic interlayer, the second diameter being less than the first diameter;
- a sidewall spacer structure disposed on an upper surface of the circular magnetic tunnel junction barrier layer and having an inner sidewall that contacts the outer sidewalls of the circular second magnetic interlayer;
- and
- a circular top electrode disposed over an upper surface of the circular second magnetic interlayer.
Dependencies are inferred from the claim text.