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US 2024/0339448 A1Published application
Novel thin film resistor
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHung-Chih YU, Chien-Mao CHEN
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Abstract
A semiconductor device includes: a metal thin film disposed on a semiconductor substrate; and first and second contact structures disposed on the metal thin film, wherein the first and second contact structures are laterally spaced from each other by a dummy layer that comprises at least one polishing resistance material.
Claims20
A semiconductor device, comprising:
- a metal thin film disposed on a semiconductor substrate, wherein the metal thin film is formed of a metal material selected from a group comprising at least one of:
- titanium (Ti), tantalum (Ta), titanium nitride (TiN), tantalum nitride (TaN), tungsten (W) and tungsten nitride (WN);
- at least one contact structure disposed on the metal thin film,
- a dummy layer disposed on the metal thin film, wherein the dummy layer comprises at least one polishing resistance material;
- and
- a transistor gate structure disposed adjacent to the at least one contact structure,
- wherein the at least one contact structure, the metal thin film and the transistor gate structure are concurrently formed, and wherein a material of the transistor gate structure is the same as the at least one polishing resistance material.
4 more elements
A semiconductor device, comprising:
- a semiconductor substrate;
- a first transistor disposed in a first region of the semiconductor substrate;
- a second transistor disposed in the first region of the semiconductor substrate, wherein the first and second transistors each has a respective metal gate;
- a thin film resistor disposed in a second region of the semiconductor substrate adjacent to the first region, the thin film resistor comprising:
- a thin film disposed on the semiconductor substrate;
- first and second contact structures disposed on respective ends of the thin film;
- a dummy layer disposed on the thin film and laterally between the first and second contact structures,
- wherein the dummy layer comprises at least one recessed region at least partially filled with a polishing resistance material;
- and
- a transistor gate structure disposed adjacent to the first contact structure, wherein the first and second contact structure, the thin film and the transistor gate structure are concurrently formed, and
- wherein the metal gate of the first transistor includes a metal layer with a work function greater than 5.2 eV, and the metal gate of the second transistor includes a metal layer with a work function less than 4.2 eV.
8 more elements
A method, comprising:
- forming a metal thin film on a semiconductor substrate;
- forming two contact structures on respective ends of the metal thin film, wherein the two contact structures are laterally spaced from each other by a dummy layer;
- forming a recessed region in the dummy layer, wherein the recessed region is laterally spaced apart from the two contact structures;
- filling the recessed region with a polishing resistance material, wherein the dummy layer and the polishing resistance material are disposed on the metal thin film;
- and
- forming a transistor gate structure disposed adjacent to the first contact structure, wherein the two contact structures, the metal thin film and the transistor gate structure are concurrently formed, wherein the two contact structures comprises first and second contact structures, and
- wherein the forming two contact structures on respective ends of the metal thin film comprises concurrently forming a p-type metal gate for a p-type first field-effect transistor (FET) in a transistor region on the semiconductor substrate.
4 more elements
Dependencies are inferred from the claim text.