Multiplication circuitry, apparatus, system, chip-containing product, method and computer-readable medium

A method comprising:

• using shared Booth encoding circuitry shared between a plurality of adder arrays, Booth encoding a first operand to generate a plurality of sets of partial product selection indicators, each partial product selection indicator corresponding to a Booth encoding of a respective Booth digit of the first operand, wherein the plurality of adder arrays comprise separate instances of hardware circuitry, the plurality of adder arrays having at least two separate enable control signals for independently controlling whether at least two subsets of the adder arrays are enabled or disabled;
• selecting, based on a second operand and the plurality of partial product selection indicators, respective sets of partial products to be added by a plurality of adder arrays;
• and
• adding the partial products using enabled adder arrays of the plurality of adder arrays to generate respective product representing values each representing a result of multiplication of a respective pair of portions of bits selected from the first operand and the second operand,
• wherein at least two of the adder arrays are configured to operate on respective partial products selected based on a same partial product selection indicator generated by the shared Booth encoding circuitry based on the Booth encoding of a same Booth digit of the first operand.

A non-transitory computer-readable medium to store computer-readable code for fabrication of multiplication circuitry comprising:

• a plurality of adder arrays each to add a respective set of partial products to generate a respective product representing value representing a result of multiplication of a respective pair of portions of bits selected from a first operand and a second operand, the plurality of adder arrays comprising separate instances of hardware circuitry, the plurality of adder arrays having at least two separate enable control signals for independently controlling whether at least two subsets of the adder arrays are enabled or disabled;
• shared Booth encoding circuitry, shared between the plurality of adder arrays, to Booth encode the first operand to generate a plurality of partial product selection indicators, each partial product selection indicator corresponding to a Booth encoding of a respective Booth digit of the first operand;
• and
• partial product selection circuitry to select, based on the second operand and the plurality of partial product selection indicators, the partial products to be added by the plurality of adder arrays;
• in which:
• at least two of the adder arrays are configured to operate on respective partial products selected by the partial product selection circuitry based on a same partial product selection indicator generated by the shared Booth encoding circuitry based on the Booth encoding of a same Booth digit of the first operand.