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US 2024/0319271 A1Published application
Semiconductor integrated circuit device and evaluation system
AssigneeRohm Co., Ltd.
InventorsHideki Miyoshi, Akira Uryu
Life of this patent
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Abstract
Provided is a semiconductor integrated circuit device including a pseudo-random pattern generator configured to output a pseudo-random pattern, a terminal for externally outputting an output of the pseudo-random pattern generator or an evaluation result of noise tolerance evaluated on the basis of the pseudo-random pattern.
Claims8
A semiconductor integrated circuit device comprising:
- a pseudo-random pattern generator configured to output a pseudo-random pattern;
- a terminal for externally outputting an output of the pseudo-random pattern generator or an evaluation result of noise tolerance evaluated on a basis of the pseudo-random pattern.
Dependencies are inferred from the claim text.