Kickback reduction in bootstrapped switches
AssigneeQUALCOMM Incorporated
InventorsLei SUN, Elias DAGHER, Dinesh Jagannath ALLADI
Life of this patent
Estimating the term…
Abstract
A system includes a switch transistor, and a bootstrap circuit having an input and an output, wherein the output of the bootstrap circuit is coupled to a gate of the switch transistor. The system also includes a first buffer having an input and an output, wherein the output of the first buffer is coupled to a terminal of the switch transistor. The system further includes a second buffer having an input and an output, wherein the input of the second buffer is coupled to the input of the first buffer, and the output of the second buffer is coupled to the input of the bootstrap circuit.
Claims30
A system, comprising:
- a switch transistor;
- a bootstrap circuit having an input and an output, wherein the output of the bootstrap circuit is coupled to a gate of the switch transistor;
- a first buffer having an input and an output, wherein the output of the first buffer is coupled to a terminal of the switch transistor;
- a second buffer having an input and an output, wherein the input of the second buffer is coupled to the input of the first buffer, and the output of the second buffer is coupled to the input of the bootstrap circuit.
A system, comprising:
- a first switch transistor;
- a second switch transistor;
- a first bootstrap circuit having an input and an output, wherein the output of the first bootstrap circuit is coupled to a gate of the first switch transistor;
- a second bootstrap circuit having an input and an output, wherein the output of the second bootstrap circuit is coupled to a gate of the second switch transistor;
- a first buffer having a first input, a second input, a first output, and a second output, wherein the first output of the first buffer is coupled to a terminal of the first switch transistor, and the second output of the first buffer is coupled to a terminal of the second switch transistor;
- and
- a second buffer having a first input, a second input, a first output, and a second output, wherein the first input of the second buffer is coupled to the first input of the first buffer, the second input of the second buffer is coupled to the second input of the first buffer, the first output of the first buffer is coupled to the input of the first bootstrap circuit, and the second output of the first buffer is coupled to the input of the second bootstrap circuit.
A method for operating a switch transistor, the method comprising:
- receiving an input signal;
- generating a first output signal based on the input signal using a first buffer;
- outputting the first output signal to a terminal of the switch transistor;
- generating a second output signal based on the input signal using a second buffer;
- boosting a voltage of the second output signal to generate a boosted voltage;
- and
- outputting the boosted voltage to a gate of the switch transistor.
A system, comprising:
- a switch transistor;
- means for buffering an input signal to obtain a first output signal and providing the first output signal to a terminal of the switch transistor;
- means for buffering the input signal to obtain a second output signal;
- and
- means for boosting a voltage of the second output signal to obtain a boosted voltage and providing the boosted voltage at a gate of the switch transistor.
Dependencies are inferred from the claim text.