Sampling circuit

A sampling circuit comprising:

• a voltage source, inputting a first voltage;
• an amplifier, inputting a second voltage, and having a characteristic that settling time in a case where an output voltage of the sampling circuit is lowered and the settling time in a case where the output voltage is raised are different;
• a capacitor, charged by an input voltage from the voltage source or the amplifier;
• a first switch, switching a connection state between the voltage source and the capacitor;
• a second switch, switching a connection state between the amplifier and the capacitor;
• a third switch, connected in parallel with the capacitor, and switching a connection state between the capacitor and a reference potential part whose potential is set according to the characteristic of the amplifier;
• and
• a control circuit, controlling switching of the first switch, the second switch, and the third switch, wherein
• the control circuit performs a first control that switches the first switch to an on state, the second switch to an off state, and the third switch to an off state, connects the voltage source to the capacitor, and charges the capacitor to the first voltage;
• after a predetermined time has elapsed from the first control, the control circuit performs a second control that switches the first switch to the off state, the second switch to the off state, and the third switch to the on state, connects the capacitor to the reference potential part, and changes a voltage of the capacitor from the first voltage to a reference potential corresponding to the characteristic of the amplifier;
• and
• after a predetermined time has elapsed from the second control, the control circuit performs a third control that switches the first switch to the off state, the second switch to the on state, and the third switch to the off state, connects the amplifier to the capacitor, and charges the capacitor to the second voltage.