US 2024/0297663 A1Published application

Sigma-delta modulator based analog-to-digital converter and dithering method thereof

AssigneeSilicon Craft Technology Public Company Limited (SICT)

InventorOon CHUSATTAYANOND

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Abstract

The disclosed invention is a sigma-delta modulator based ADC and a dithering method thereof. An analog dither circuit of an input stage in a quantizer, which is configured to perform dithering, receives an integrator output signal from an output of an integrator and a plurality of digital dither signals from digital dither generator, and employs these signals to produce multi-level analog dither signals via the operation of a plurality of transistors as switches coupled with a plurality of resistors coupled in series. The multi-level analog dither signals can prevent, reduce, or eliminate limit cycle in the sigma-delta modulator based ADC. Furthermore, disclosed invention does not require fixed load capacitance, resulting in no extra power consumption and solve the problem as the kickback noise variation.

Claims30

Dependent claims

A sigma-delta modulator based analog-to-digital converter (ADC) (100), comprising:

a digital dither generator (101) configured to provide a plurality of digital dither signals Sdi the digital dither generator (101) comprising a dither pattern generator (601) and a binary decoder (602);
a sigma-delta modulator loop (102) configured to receive an input analog signal Sin and the plurality of digital dither signals Sdi, and to provide a quantizer output signal Sq;
and
a processor (103) configured to provide a digital representation of the input analog signal Sin.
where the sigma-delta modulator loop (102) comprising
an integrator (104) configured to provide an integrator output signal Sint;
a feedback digital to analog converter (DAC) (105) configured to receive the quantizer output signal Sq and to produce a feedback signal Sfb;
and
a quantizer (106) configured to receive the integrator output signal Sint and the plurality of digital dither signals Sdi and to output the quantizer output signal Sq,
where the quantizer (106) comprising
an input stage (201) configured to receive the integrator output signal Sint and the plurality of digital dither signals Sdi and to provide an output signal Scmp;
and
a gain stage (202) configured to receive the output signal Scmp and to output the quantizer output signal Sq.
where the input stage (201) comprising
a current source (301);
a pair of input transistors (302) configured to produce first and second output current signals Scurr_a, Scurr_b in relation to the integrator output signal Sint and a threshold signal Sthreshold;
a load network (303) configured to convert the first and second output current signals Scurr_a, Scurr_b into the output signals Scmp_a, Scmp_b of the input stage (201);
and
an analog dither circuit (304)
characterized in that
the analog dither circuit (304), coupled in series between the current source (301) and
the pair of input transistors (302) and configured to receive the plurality of digital dither signals Sdi and to divide a bias current from the current source (301) to each transistor of the pair of input transistors (302).

19 more elements

A dithering method of sigma-delta based modulator analog-to-digital converter (ADC), comprising:

receiving an input analog signal Sin and a feedback signal Se at an integrator (104) to provide an integrator output signal Sint;
receiving the integrator output signal Sint and a plurality of digital dither signal Sdi at an input stage (201) of a quantizer (106) and comparing the integrator output signal Sint and the plurality of digital dither signal Sdi against a threshold signal Sthreshold to produce an output signal Scmp of the input stage (201);
amplifying the output signal Scmp of the input stage (201) at a gain stage (202) to produce a quantizer output signal Sq;
receiving the quantizer output signal Sq at a processor (103) to produce a plurality of output digital signals Sout as a digital representation of the input analog signal Sin;
characterized in that
receiving the plurality of digital dither signals Sdi at control terminals (405) of a plurality of transistors as switches (402) to control the plurality of transistors as switches (402) as turning on or off;
providing current from a current source (301) to first and second source terminals Ssource_a, Ssource_b of a pair of input transistors (302) through the plurality of transistors as switches (402) and a plurality of resistors (401) respectively;
receiving the integrator output signal Sint and the threshold signal Sthreshold at control terminals (305) of the pair of input transistors (302);
producing first and second output current signals Scurr_a, Scurr_b in relation to the integrator output signal Sint and the threshold signal Sthreshold;
and
converting the first and second output current signals Scurr_a, Scurr_b at a load network (303) to the output signals Scmp_a, Scmp_b of the input stage (201).

8 more elements

Dependencies are inferred from the claim text.