Distributed built-in self-test and monitoring
AssigneeQUALCOMM Incorporated
InventorsZdravko LUKIC, Raymond ROSIK, Brett WALKER, Huiqiao HE
Life of this patent
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Abstract
Aspects of the present disclosure provide techniques and apparatus for distributed built-in self-test. An example method of testing circuitry includes testing, in a first occasion, a first electrical circuit, having a first component, using at least a second component of a second electrical circuit; and testing, in a second occasion, the second electrical circuit using at least the first component of the first electrical circuit.
Claims30
A method of testing circuitry, comprising:
- testing, in a first occasion, a first electrical circuit, having a first component, using at least a second component of a second electrical circuit;
- and
- testing, in a second occasion, the second electrical circuit using at least the first component of the first electrical circuit.
A method of testing circuitry, comprising:
- testing, in a first occasion, a first electrical circuit, having a first electrical component, using at least a second component of a second electrical circuit;
- and
- monitoring a signal output by a third electrical circuit using the first electrical circuit in response to detecting a successful test from the testing.
An apparatus for testing circuitry, comprising:
- a first electrical circuit having a first component;
- a second electrical circuit having a second component selectively coupled to the first electrical circuit;
- a memory;
- and
- a processor coupled to the memory, the processor being configured to:
- test, in a first occasion, the first electrical circuit using at least the second component, and
- test, in a second occasion, the second electrical circuit using at least the first component.
An apparatus, comprising:
- a first electrical circuit having a first digital-to-analog converter (DAC) and a first comparator, wherein the first DAC is coupled to a first input of the first comparator;
- a second electrical circuit having a second DAC selectively coupled to a second input of the first comparator;
- and
- a third electrical circuit having an output selectively coupled to the second input of the first comparator.
Dependencies are inferred from the claim text.