Nonvolatile memory device and method of controlling the same
AssigneeSamsung Electronics Co., Ltd.
InventorsYohan LEE, Jaeduk YU, Sangsoo PARK, Yonghyuk CHOI
Life of this patent
Estimating the term…
Abstract
A method of controlling a nonvolatile memory device, includes: determining, based on a write address, whether selected memory cells of the nonvolatile memory device corresponding to the write address are included in an over-erased group; based on the selected memory cells being included in the over-erased group, performing a preprogram operation to increase threshold voltages of an over-erased state of the selected memory cells; and after completion of the preprogram operation, performing a data program operation to store write data in the selected memory cells.
Claims20
A method of controlling a nonvolatile memory device, the method comprising:
- determining, based on a write address, whether selected memory cells of the nonvolatile memory device corresponding to the write address are included in an over-erased group;
- based on the selected memory cells being included in the over-erased group, performing a preprogram operation to increase threshold voltages of an over-erased state of the selected memory cells;
- and
- after completion of the preprogram operation, performing a data program operation to store write data in the selected memory cells.
A nonvolatile memory device comprising:
- a memory cell array comprising a plurality of memory cells;
- and
- a control circuit configured to:
- based on selected memory cells corresponding to a write address being included in an over-erased group, perform a preprogram operation to increase threshold voltages of an over-erased state of the selected memory cells, and
- after performing the preprogram operation, performing a data program operation to store write data in the selected memory cells.
A nonvolatile memory device comprising:
- a plurality of first bonding metal patterns disposed in a cell region;
- a plurality of second bonding metal patterns disposed in a peripheral region disposed under the cell region, wherein the peripheral region is vertically coupled to the cell region by the plurality of first bonding metal patterns and the plurality of second bonding metal patterns;
- a memory cell array disposed in the cell region, the memory cell array comprising a plurality of memory cells;
- and
- a control circuit disposed in the peripheral region, the control circuit being configured to:
- based on selected memory cells corresponding to a write address being included in an over-erased group, perform a preprogram operation to increase threshold voltages of an over-erased state of the selected memory cells, and
- after performing the preprogram operation, performing a data program operation to store write data in the selected memory cells.
Dependencies are inferred from the claim text.