US 2024/0268103 A1Published application

Semiconductor devices

AssigneeSamsung Electronics Co., Ltd.

InventorsJunsoo KIM, Sungho JANG

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Abstract

A semiconductor device includes a first active pattern protruding from a substrate and extending in a first direction parallel to an upper surface of the substrate; first and second recesses crossing the first active pattern in a second direction perpendicular to the first direction; a first gate structure in the first recess, and including a first gate oxide layer, a first gate pattern and a first capping pattern; a second gate structure in the second recess, and including a second gate oxide layer, a second gate pattern and a second capping pattern; a first metal liner pattern surrounding a portion of a sidewall of the first active pattern, and directly contacting a sidewall of the first gate pattern; and a second metal liner pattern surrounding a portion of the sidewall of the first active pattern, and directly contacting a sidewall of the second gate pattern.

Claims20

Dependent claims

A semiconductor device, comprising:

a substrate;
a first active pattern protruding from the substrate, the first active pattern having an isolated shape, and a longitudinal direction of the first active pattern extending in a first direction parallel to an upper surface of the substrate;
a first recess and a second recess on the first active pattern and crossing the first active pattern, each of the first recess and the second recess extending in a second direction parallel to the upper surface of the substrate and perpendicular to the first direction, and the first recess and the second recess being spaced apart from each other in the first direction;
a first gate structure in the first recess, the first gate structure including a first gate oxide layer, a first gate pattern, and a first capping pattern;
a second gate structure in the second recess, the second gate structure including a second gate oxide layer, a second gate pattern, and a second capping pattern;
a first metal liner pattern surrounding a first portion of a sidewall of the first active pattern and being spaced apart from the sidewall of the first active pattern, the first metal liner pattern directly contacting a sidewall of the first gate pattern;
and
a second metal liner pattern surrounding a second portion of the sidewall of the first active pattern and being spaced apart from the sidewall of the first active pattern, the second metal liner pattern directly contacting a sidewall of the second gate pattern.

5 more elements

A semiconductor device, comprising:

a substrate;
first active patterns protruding from the substrate, each of the first active patterns having an isolated shape with a longitudinal direction extending in a first direction parallel to an upper surface of the substrate, and the first active patterns being spaced apart from each other and arranged in a second direction parallel to the upper surface of the substrate and perpendicular to the first direction;
a first recess and a second recess on each of the first active patterns, each of the first recess and the second recess extending in the second direction and crossing the first active patterns arranged in the second direction, and the first recess and the second recess being spaced apart from each other in the first direction;
a first gate structure in the first recess, the first gate structure including a first gate pattern extending in the second direction;
a second gate structure in the second recess, the second gate structure including a second gate pattern extending in the second direction;
a first structure surrounding a sidewall of a first portion of each of the first active patterns outside of the first gate structure, the first structure including a first insulation layer pattern and a first metal liner pattern laterally stacked on the sidewall of the first portion, and opposite ends of the first metal liner pattern being in contact with a sidewall of the first gate pattern;
and
a second structure surrounding a sidewall of a second portion of each of the first active patterns outside of the second gate structure, the second structure including a second insulation layer pattern and a second metal liner pattern laterally stacked on the sidewall of the second portion, and opposite ends of the second metal liner pattern being in contact with a sidewall of the second gate pattern.

5 more elements

A vertical semiconductor device, comprising:

a substrate;
a first active pattern protruding from the substrate, the first active pattern having an isolated shape with a longitudinal direction extending in a first direction parallel to an upper surface of the substrate;
a first gate structure and a second gate structure on the first active pattern and crossing the first active pattern, each of the first gate structure and the second gate structure extending in a second direction parallel to the upper surface of the substrate and perpendicular to the first direction, and the first gate structure and the second gate structure being spaced apart from each other in the first direction;
a first metal liner pattern surrounding a first portion of a sidewall of the first active pattern and being spaced apart from the sidewall of the first active pattern, the first metal liner pattern having an upper surface lower than an upper surface of the first gate structure;
a second metal liner pattern surrounding a second portion of the sidewall of the first active pattern and being spaced apart from the sidewall of the first active pattern, the second metal liner pattern having an upper surface lower than an upper surface of the second gate structure;
a bit line structure electrically connected to an upper portion of the first active pattern between the first gate structure and the second gate structure;
contact plugs contacting an upper portion of the first active pattern outside the first gate structure and an upper portion of the first active pattern outside the second gate structure, respectively;
and
a capacitor electrically connected to each of the contact plugs.

6 more elements

Dependencies are inferred from the claim text.