Time ordered switching
AssigneeIntel Corporation
InventorsAnil VASUDEVAN, Roberto PENARANDA CEBRIAN, Md Ashiqur RAHMAN, Pedro YEBENES SEGURA, Allister ALEMANIA
Life of this patent
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Abstract
Examples described herein relate to a network interface device that includes an interface to a port; and a circuitry. The circuitry can be configured to: receive a first packet that comprises a time stamp associated with a prior or originating transmission of the first packet by a transmitter network interface device; enqueue an entry for the first packet in a queue; and dequeue the entry based at least in part on the time stamp.
Claims20
An apparatus comprising:
- a network interface device comprising:
- an interface to a port;
- and
- a circuitry configured to:
- receive a first packet that comprises a time stamp associated with a prior or originating transmission of the first packet by a transmitter network interface device;
- enqueue an entry for the first packet in a queue;
- and
- dequeue the entry based at least in part on the time stamp.
At least one non-transitory computer-readable medium comprising instructions stored thereon, that if executed by a switch circuitry, cause the switch circuitry to:
- egress a packet associated with a queue and a second packet associated with a second queue based on time stamps associated with the packet and the second packet, wherein the packet and the second packet are received from multiple network interface devices and wherein the time stamps associated with the packet and the second packet are indicative of transmission of the packet and the second packet.
A method comprising:
- a switch performing:
- egressing a packet associated with a queue and a second packet associated with a second queue based on time stamps associated with the packet and the second packet, wherein the packet and the second packet are received by the switch from multiple network interface devices.
Dependencies are inferred from the claim text.