Buffer structure with interlayer buffer layers for high voltage device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChi-Ming Chen, Kuei-Ming Chen
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Abstract
Various embodiments of the present disclosure are directed towards an integrated chip a semiconductor device including a plurality of superlattice layers disposed over a substrate. The plurality of superlattice layers include a first superlattice layer overlying a second superlattice layer. A channel layer overlies the plurality of superlattice layers. An active layer overlies the channel layer. A first interlayer buffer layer is disposed directly between the first superlattice layer and the second superlattice layer. The first interlayer buffer layer comprises a first density of dislocations greater than a second density of dislocations in the first superlattice layer.
Claims20
A semiconductor device, comprising:
- a plurality of superlattice layers disposed over a substrate, wherein the plurality of superlattice layers comprise a first superlattice layer overlying a second superlattice layer;
- a channel layer overlying the plurality of superlattice layers;
- an active layer overlying the channel layer;
- and
- a first interlayer buffer layer disposed directly between the first superlattice layer and the second superlattice layer, wherein the first interlayer buffer layer comprises a first density of dislocations greater than a second density of dislocations in the first superlattice layer.
A semiconductor device, comprising:
- a seed layer overlying a substrate and comprising aluminum nitride (AlN);
- a channel layer overlying the seed layer and comprising gallium nitride (GaN);
- an active layer overlying the channel layer and comprising aluminum gallium nitride (AlGaN);
- and
- a buffer structure disposed between the channel layer and the seed layer, wherein the buffer structure comprises a plurality of superlattice layers alternatingly stacked with a plurality of interlayer buffer layers, wherein the plurality of superlattice layers respectively comprise a first semiconductor layer stacked with a second semiconductor layer, wherein the second semiconductor layer comprises AlN, wherein the plurality of interlayer buffer layers comprises AlN and/or AlGaN, and wherein the plurality of interlayer buffer layers comprise one or more dopants.
A method for forming a semiconductor device, comprising:
- forming a seed layer over a substrate;
- forming a plurality of superlattice layers and a plurality of interlayer buffer layers over the seed layer, wherein the interlayer buffer layers are stacked alternatingly with the superlattice layers, wherein the superlattice layers are formed at a first temperature and the interlayer buffer layers are formed at a second temperature less than the first temperature;
- forming a channel layer over the plurality of superlattice layers;
- and
- forming an active layer over the channel layer.
Dependencies are inferred from the claim text.