Semiconductor Devices Having Funnel-Shaped Gate Structures
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShu-Han Chen, Tsung-Ju Chen, Chun-Heng Chen, Chi On Chui
Life of this patent
Estimating the term…
Abstract
In an embodiment, a structure includes: a nano-structure; an epitaxial source/drain region adjacent the nano-structure; a gate dielectric wrapped around the nano-structure; a gate electrode over the gate dielectric, the gate electrode having an upper portion and a lower portion, a first width of the upper portion increasing continually in a first direction extending away from a top surface of the nano-structure, a second width of the lower portion being constant along the first direction; and a gate spacer between the gate dielectric and the epitaxial source/drain region.
Claims20
A semiconductor device comprising:
- a source/drain region;
- a nano-structure adjacent the source/drain region;
- a gate structure wrapped around the nano-structure, the gate structure comprising:
- a gate dielectric;
- and
- a gate electrode over the gate dielectric, the gate electrode having an upper portion and a lower portion, a first width of the upper portion increasing continually in a first direction extending away from a top surface of the nano-structure, a second width of the lower portion being constant along the first direction;
- and
- a gate spacer between the gate structure and the source/drain region, the gate dielectric separating the gate spacer from the upper portion and the lower portion of the gate electrode.
A semiconductor device comprising:
- a nano-structure;
- a gate structure wrapped around the nano-structure, a lower portion of the gate structure having a first width, an upper portion of the gate structure having a second width, the second width being greater than the first width;
- a gate mask over the gate structure, the gate mask having a third width, the third width being greater than the second width;
- and
- a gate spacer contacting a sidewall of the gate mask and a sidewall of the gate structure, a top surface of the gate spacer being coplanar with a top surface of the gate mask.
A semiconductor device comprising:
- a nano-structure;
- a gate dielectric wrapped around the nano-structure;
- a gate electrode over the gate dielectric, the gate electrode having an upper portion and a lower portion, the gate dielectric contacting a sidewall of the upper portion, the gate dielectric contacting a sidewall of the lower portion;
- a gate mask over the gate electrode;
- and
- a gate contact extending through the gate mask to contact the gate electrode, a first width of the lower portion of the gate electrode being constant along a first direction extending from the nano-structure to the gate contact, a second width of the upper portion of the gate electrode increasing in the first direction, a third width of the gate mask increasing in the first direction.
Dependencies are inferred from the claim text.