Image sensor and a method of manufacturing the same

A method of manufacturing an image sensor, the method comprising:

• preparing a substrate comprising a first surface and a second surface that is opposite to the first surface;
• forming a deep trench extending from the first surface into the substrate;
• forming a side insulating layer at least partially covering an inner surface of the deep trench;
• forming a semiconductor layer at least partially covering the side insulating layer;
• forming a first filling layer filling the deep trench on the semiconductor layer;
• forming a second trench and a first filling pattern by performing etching on the first filling layer;
• and
• forming an oxidized semiconductor layer by oxidizing a first portion of the semiconductor layer which is exposed by the second trench,
• wherein a second portion of the semiconductor layer that is different from the first portion of the semiconductor layer is formed into a semiconductor pattern.

An image sensor comprising:

• a substrate comprising:
• a plurality of pixel regions;
• a first surface;
• and
• a second surface that is opposite to the first surface,
• wherein the plurality of pixel regions are arranged in a first direction and a second direction that are intersecting and that are parallel to the second surface;
• a deep device isolation pattern extending from the first surface into the substrate in a third direction perpendicular to the second surface and that is between the plurality of pixel regions;
• and
• a shallow device isolation pattern adjacent to the first surface,
• wherein the deep device isolation pattern comprises:
• a first filling pattern adjacent to the second surface;
• a second filling pattern on the first filling pattern and penetrating the shallow device isolation pattern;
• a semiconductor pattern between the first filling pattern and the substrate;
• an oxidized semiconductor pattern on the semiconductor pattern, and between the shallow device isolation pattern and the second filling pattern;
• and
• a side insulating pattern between the semiconductor pattern and the substrate.