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US 2024/0266290 A1Published application
Integrated circuit including backside wiring pattern
AssigneeSamsung Electronics Co., Ltd.
InventorByounggon Kang
Life of this patent
Estimating the term…
Abstract
An integrated circuit includes a substrate and a plurality of standard cells on the substrate. A standard cell of the plurality of standard cells includes a backside wiring pattern arranged on a lower portion of the substrate and including at least an internal connection node of the standard cell and a plurality of gate lines arranged on an upper portion of the substrate and extending in a first horizontal direction. At least one of the plurality of gate lines functions as an input pin of the standard cell.
Claims20
An integrated circuit comprising:
- a substrate;
- and
- a plurality of standard cells on the substrate,
- wherein a standard cell of the plurality of standard cells includes:
- a backside wiring pattern arranged on a lower portion of the substrate and including at least an internal connection node of the standard cell;
- and
- a plurality of gate lines arranged on an upper portion of the substrate and extending in a first horizontal direction,
- wherein at least one of the plurality of gate lines functions as an input pin of the standard cell.
5 more elements
An integrated circuit comprising:
- a substrate;
- and
- a plurality of standard cells on the substrate,
- wherein a standard cell of the plurality of standard cells includes:
- a backside wiring pattern arranged on a lower portion of the substrate including at least an internal connection node of the standard cell;
- a frontside wiring pattern formed on an upper portion of the substrate including:
- an input pin configured to receive an input signal, and
- an output pin configured to output an output signal;
- and
- a backside contact connecting the backside wiring pattern to an active region of the substrate and penetrating the substrate.
7 more elements
An integrated circuit comprising:
- a substrate;
- and
- a plurality of standard cells on the substrate,
- wherein a standard cell of the plurality of standard cells includes:
- a backside wiring pattern arranged on a lower portion of the substrate including at least an internal connection node of the standard cell;
- a plurality of gate lines arranged on an upper portion of the substrate and extending in a first horizontal direction;
- a plurality of active regions arranged on the upper portion of the substrate and extending in a second horizontal direction perpendicular to the first horizontal direction;
- and
- a plurality of active contacts in contact with the plurality of active regions, respectively,
- wherein at least one of the plurality of active contacts functions as an output pin of the standard cell.
7 more elements
Dependencies are inferred from the claim text.