Multilayer-type on-chip inductor structure
AssigneeVia Labs, Inc.
InventorSheng-Yuan LEE
Life of this patent
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Abstract
A multilayer-type on-chip inductor structure includes an inter-metal dielectric (IMD) layer having an inductor central region, a first metal winding portion disposed in the IMD layer, and a second metal winding portion disposed in the IMD layer and electrically connected to the overlying first metal winding portion. The first metal winding portion includes a first spiral-type coil surrounding the inductor central region and a first open ring-type coil surrounding the first spiral-type coil. The second metal winding portion includes a second spiral-type coil vertically overlapping the first spiral-type coil and the first open ring-type coil, so that the outermost-turn coil of the second spiral-type coil corresponds to the first open ring-type coil.
Claims19
A multilayer-type on-chip inductor structure, comprising:
- an inter-metal dielectric (IMD) layer having an inductor central region;
- a first metal winding portion disposed in the IMD layer, comprising:
- a first spiral-type coil surrounding the inductor central region;
- and
- a first open ring-type coil surrounding the first spiral-type coil;
- and
- a second metal winding portion disposed in the IMD layer and electrically connected to the overlying first metal winding portion, comprising:
- a second spiral-type coil vertically overlapping the first spiral-type coil and the first open ring-type coil, so that an outermost-turn coil of the second spiral-type coil corresponds to the first open ring-type coil.
A multilayer-type on-chip inductor structure, comprising:
- an inter-metal dielectric (IMD) layer having an inductor central region;
- a topmost metal layer disposed in the IMD layer, comprising:
- a first double-turn spiral-type coil surrounding the inductor central region;
- and
- a first single-turn open ring-type coil surrounding the first double-turn spiral-type coil;
- a next-topmost metal layer disposed in the IMD layer, comprising:
- a second single-turn open ring-type coil surrounding the inductor central region and vertically overlapping an inner-turn coil of the first double-turn spiral-type coil;
- and
- a second double-turn spiral-type coil surrounding the second single-turn open ring-type coil, wherein the first single-turn open ring-type coil vertically overlaps an outer-turn of the second double-turn spiral-type coil;
- and
- a first via-structure region, a second via-structure region, and a third via-structure region disposed between the topmost metal layer and the next-topmost metal layer and electrically connected thereto.
A multilayer-type on-chip inductor structure, comprising:
- an inter-metal dielectric (IMD) layer having an inductor central region;
- a topmost metal layer disposed in the IMD layer, comprising:
- a single-turn spiral-type coil surrounding the inductor central region;
- and
- a single-turn open ring-type coil surrounding the single-turn spiral-type coil;
- a next-topmost metal layer disposed in the IMD layer, comprising:
- a double-turn spiral-type coil surrounding the inductor central region, wherein the single-turn spiral-type coil vertically overlaps an inner-turn coil of the double-turn spiral-type coil, and the single-turn open ring-type coil vertically overlaps an outer-turn coil of the double-turn spiral-type coil;
- a first via-structure region electrically connected to a first end portion of the single-turn open ring-type coil and the end portion of the outer-turn coil of the double-turn spiral-type coil;
- and
- a second via-structure region electrically connected to a first end portion of the single-turn spiral-type coil and an end portion of the inner-turn coil of the double-turn spiral-type coil.
Dependencies are inferred from the claim text.