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US 2024/0266106 A1Published application
Via-based inductor coil for integrated silicon applications
AssigneeNVIDIA Corporation
InventorsJoseph Minacapelli, Cong Gao
Life of this patent
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Abstract
Integrated inductors are formed by arranging multiple vias to bracket a volume of semiconductor substrate, where each via includes a top metal pad and a bottom metal pad. The vias are alternately connected by way of the top and bottom pads to form an end-to-end current loop along a length of the volume of semiconductor substrate.
Claims20
A method comprising:
- forming a plurality of vias in a semiconductor substrate such that the vias bracket a volume of core material;
- and
- configuring traces between top pads of the vias and between bottom pads of the vias to form a continuous path for current to flow circumferentially from a first end of the core material to a second end of the core material.
A semiconductor substrate comprising:
- a volume of substrate material bordered by two rows of vias;
- and
- metal traces configured between the vias to form a coil along a length of the volume of substrate material.
An inductor comprising:
- a plurality of vias bracketing volume of semiconductor substrate, each via comprising a top metal pad and a bottom metal pad;
- and
- the vias alternately connected by way of the top metal pads and the bottom metal pads to form an end-to-end current loop along a length of the volume of semiconductor substrate.
Dependencies are inferred from the claim text.