Circuit and method for carrying out a vector operation

A method for carrying out a vector operation between an input vector with input entries and a weight vector with weight entries using a circuit including:

• a plurality of memory cells which are connected to a column line, wherein each memory cell of the plurality of memory cells has an input terminal and a semiconductor switching element, the semiconductor switching elemnent having a gate terminal connected to the input terminal, and a drain terminal and a source terminal, wherein the drain terminal or the source terminal is in each case connected to the column line, wherein, when a sufficiently high gate voltage in terms of magnitude is at the gate terminal, the memory cell is activated so that an electrical cell current is conducted out of or into the column line at suitable voltages at the drain terminal and at the source terminal,
• an input voltage circuit connected to the input terminals and configured or can be actuated to generate input voltages at the input terminals according to specifiable input values,
• a detection circuit connected to the column line and having an analog-to-digital converter which is configured to determine a digital value corresponding to an intensity of a measurement current flowing into or out of the column line,
• wherein the detection circuit is configured to detect the digital value determined by the analog-to-digital converter at predetermined or determinable detection times to determine measurement values corresponding to the detection times, and is configured to reduce the measurement current at reduction times by a cell current of already activated memory cells;
• wherein the method comprises the following steps:
• actuating the input voltage circuit with input values corresponding to the input entries, and causing the input voltage circuit to generate input voltages;
• actuating the detection circuit to determine the measurement values at the detection times;
• and
• detecting the measurement values.

A vector operation circuit, comprising:

• a circuit including:
• a plurality of memory cells which are connected to a column line, wherein each memory cell of the plurality of memory cells has an input terminal and a semiconductor switching element, the semiconductor switching elemnent having a gate terminal connected to the input terminal, and a drain terminal and a source terminal, wherein the drain terminal or the source terminal is in each case connected to the column line, wherein, when a sufficiently high gate voltage in terms of magnitude is at the gate terminal, the memory cell is activated so that an electrical cell current is conducted out of or into the column line at suitable voltages at the drain terminal and at the source terminal,
• an input voltage circuit connected to the input terminals and configured or can be actuated to generate input voltages at the input terminals according to specifiable input values,
• a detection circuit connected to the column line and having an analog-to-digital converter which is configured to determine a digital value corresponding to an intensity of a measurement current flowing into or out of the column line,
• wherein the detection circuit is configured to detect the digital value determined by the analog-to-digital converter at predetermined or determinable detection times to determine measurement values corresponding to the detection times, and is configured to reduce the measurement current at reduction times by a cell current of already activated memory cells;
• and
• a control circuit which is configured to carry out a vector operation between an input vector with input entries and a weight vector with weight entries using the circuit, the control circuit being configured to:
• actuate the input voltage circuit with input values corresponding to the input entries, and causing the input voltage circuit to generate input voltages;
• actuate the detection circuit to determine the measurement values at the detection times;
• and
• detect the measurement values.