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US 2024/0264231 A1Published application
Techniques for infield testing of cryptographic circuitry
AssigneeIntel Corporation
InventorsRakesh KANDULA, Michaël Carl NÈVE DE MÉVERGNIES
Life of this patent
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Abstract
Examples include techniques for infield testing of cryptographic circuitry located on a die. The infield testing to include providing a pass or fail status of an infield test scan of the cryptographic circuitry based on comparing an output generated by the cryptographic circuitry during a test run to a signature. The output generated by the cryptographic circuitry is in response to an input generated by a linear-feedback shift register during the test run.
Claims20
An apparatus comprising:
- an linear-feedback shift register (LFSR);
- a register configured to store data generated by cryptographic circuitry on a die;
- and
- control logic configured to:
- based on a start indicator, cause the LFSR to generate, over a plurality of clock cycles, a random pattern that is to be inputted to the cryptographic circuitry;
- provide, to the register, output data generated by the cryptographic circuitry during the plurality of clock cycles;
- compare the output data in the register to a signature that is based on expected data to be output from the cryptographic circuitry in response to the inputted random pattern;
- and
- provide an indication of whether the cryptographic circuitry passes or fails an infield test scan based on whether the output data matches the signature.
6 more elements
A method comprising:
- receiving an indication to initiate an infield test scan of cryptographic circuitry on a die;
- causing a linear-feedback shift register (LFSR) to generate, over a plurality of clock cycles, a random pattern that is inputted to the cryptographic circuitry;
- causing a register to store output data generated by the cryptographic circuitry during the plurality of clock cycles;
- comparing the output data in the register to a signature that is based on expected data to be output from the cryptographic circuitry in response to the inputted random pattern;
- and
- providing an indication of whether the cryptographic circuitry passes or fails the infield test scan based on whether the output data matches the signature.
3 more elements
A system comprising:
- cryptographic circuitry on a die;
- and
- cryptographic test circuitry configured to:
- based on a start indicator, cause a linear-feedback shift register (LFSR) to generate, over a plurality of clock cycles, a random pattern that is inputted to the cryptographic circuitry;
- provide, to a register, output data generated by the cryptographic circuitry during the plurality of clock cycles;
- compare the output data in the register to a signature that is based on expected data to be output from the cryptographic circuitry in response to the inputted random pattern;
- and
- provide an indication of whether the cryptographic circuitry passes or fails an infield test scan based on whether the output data matches the signature.
5 more elements
Dependencies are inferred from the claim text.