Pulsed transistor driver circuit
AssigneeTexas Instruments Incorporated
InventorJoseph M Khayat
Life of this patent
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Abstract
A circuit includes a first drive stage, a second drive stage, and a pulse circuit. The first drive stage is coupled between a drive terminal and high-side transistor control terminal. The second drive stage is coupled between the first drive stage and the high-side transistor control terminal. The pulse circuit is coupled between the high-side transistor control terminal and the second drive stage. The pulse circuit is configured to disable the second drive stage for a pulse interval responsive to a voltage at the high-side transistor control terminal exceeding a threshold voltage.
Claims20
A circuit, comprising:
- a first drive stage having a first drive input, a first drive output, and a second drive output;
- in which the first drive input is coupled to a drive terminal;
- a second drive stage having:
- a second drive input coupled to the first drive output;
- a third drive input;
- and
- a third drive output coupled to the second drive output;
- and
- a pulse circuit having:
- a pulse input coupled to the second drive output;
- and
- a pulse output coupled to the third drive input.
A circuit comprising:
- a first drive stage coupled between a drive terminal and high-side transistor control terminal;
- a second drive stage coupled between the first drive stage and the high-side transistor control terminal;
- and
- a pulse circuit coupled between the high-side transistor control terminal and the second drive stage, the pulse circuit configured to disable the second drive stage for a pulse interval responsive to a voltage at the high-side transistor control terminal exceeding a threshold voltage.
A circuit comprising:
- a low-side transistor coupled between a switching terminal and a ground terminal, the low-side transistor having a first control input;
- a high-side transistor coupled between a power terminal and the switching terminal, the high-side transistor having a second control input;
- a low-side drive circuit having a first drive output coupled to the first control input;
- and
- a high-side drive circuit having a second drive output coupled to the second control input, in which the high-side drive circuit includes:
- a first drive stage coupled between a drive terminal and high-side transistor control terminal;
- a second drive stage coupled between the first drive stage and the high-side transistor control terminal;
- and
- a pulse circuit coupled between the high-side transistor control terminal and the second drive stage, the pulse circuit configured to disable the second drive stage for a pulse interval responsive to a voltage at the high-side transistor control terminal exceeding a threshold voltage.
Dependencies are inferred from the claim text.