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US 2024/0258383 A1Published application
Soft switching by active backside field plate
AssigneeAnalog Devices, Inc.
InventorsJames G. Fiorenza, Daniel Piedra
Life of this patent
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Abstract
This disclosure describes various techniques to use a backside field-plated GaN HEMT device as a four-terminal device. The backside field plate (BFP) may be independently biased and used to adjust the 2DEG current density in the device. By independently controlling the 2DEG channel density using the BFP, the channel current may be reduced prior to switching events, thereby enabling soft-switching using the BFP. Thus, the BFP may be used to reduce the current through the device during switching events to reduce the power loss and stress on the device that may occur during hard-switching.
Claims20
A compound semiconductor heterostructure transistor device comprising:
- a substrate;
- a first semiconductor material layer formed over the substrate;
- a second semiconductor material layer formed over the first semiconductor material layer to form a compound semiconductor heterostructure having a two-dimensional electron gas (2DEG) channel, wherein the 2DEG channel is more conductive than either the first semiconductor material layer or the second semiconductor material layer;
- a drain electrode electrically coupled with the 2DEG channel;
- a source electrode electrically coupled with the 2DEG channel;
- a gate electrode formed over the second semiconductor material layer;
- a backside field plate disposed at least partially within the substrate, the backside field plate configured to modulate an electric field between the gate electrode and the drain electrode of the transistor device;
- and
- a backside field plate electrode electrically coupled with the backside field plate, wherein the backside field plate electrode is configured to be electrically coupled with a voltage supply that is independent of a gate voltage, a drain voltage, and a source voltage.
6 more elements
A method of forming a compound semiconductor heterostructure transistor device, the method comprising:
- forming a first semiconductor material layer over a substrate;
- forming a second semiconductor material layer over the first semiconductor material layer to form a compound semiconductor heterostructure having a two-dimensional electron gas (2DEG) channel, wherein the 2DEG channel is more conductive than either the first semiconductor material layer or the second semiconductor material layer;
- electrically coupling a drain electrode with the 2DEG channel;
- electrically coupling a source electrode with the 2DEG channel;
- forming a gate electrode over the first semiconductor material layer;
- forming a backside field plate, wherein the backside field plate is disposed at least partially within the substrate, the backside field plate extending laterally from a region underlying the source electrode of the transistor device to a region between the gate electrode and the drain electrode of the transistor device, the backside field plate configured to modulate an electric field between the gate electrode and the drain electrode of the transistor device;
- forming a backside field plate electrode electrically coupled with the backside field plate;
- and
- electrically coupling the backside field plate electrode with a voltage supply that is independent of a gate voltage, a drain voltage, and a source voltage.
6 more elements
A compound semiconductor heterostructure transistor device comprising:
- a substrate;
- a first semiconductor material layer formed over the substrate;
- a second semiconductor material layer formed over the first semiconductor material layer to form a compound semiconductor heterostructure having a two-dimensional electron gas (2DEG) channel, wherein the 2DEG channel is more conductive than either the first semiconductor material layer or the second semiconductor material layer;
- a drain electrode electrically coupled with the 2DEG channel;
- a source electrode electrically coupled with the 2DEG channel;
- a gate electrode formed over the second semiconductor material layer;
- a backside field plate disposed at least partially within the substrate, the backside field plate extending laterally from a region underlying the source electrode of the transistor device to a region between the gate electrode and the drain electrode of the transistor device, the backside field plate configured to modulate an electric field between the gate electrode and the drain electrode of the transistor device;
- a backside field plate electrode electrically coupled with the backside field plate, wherein the backside field plate electrode is configured to be electrically coupled with a voltage supply that is independent of a gate voltage, a drain voltage, and a source voltage;
- and
- a top-side field plate formed over the second semiconductor material layer.
7 more elements
Dependencies are inferred from the claim text.