Ic device with vertically-graded silicon germanium region adjacent device channel and method for forming
AssigneeGlobalFoundries U.S. Inc.
InventorsJudson Robert Holt, George Robert Mulfinger
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Abstract
An integrated circuit (IC) device is disclosed which includes a first transistor over a substrate. The first transistor includes a gate over the substrate and between a source region and a drain region. The transistor further includes a first region of vertically-graded silicon germanium (“SiGe”) adjacent a first side of a channel under the gate, and a second region of vertically-graded SiGe adjacent a second side of the channel. The channel includes substantially uniformly-graded SiGe.
Claims20
An integrated circuit (IC) device, comprising:
- a substrate;
- and
- a first transistor over the substrate, including:
- a gate over the substrate and between a source region and a drain region,
- a first region of vertically-graded silicon germanium (“SiGe”) adjacent a first side of a channel under the gate, and
- a second region of vertically-graded SiGe adjacent a second side of the channel, wherein the channel includes substantially uniformly-graded SiGe.
An integrated circuit (IC) device, comprising:
- a first transistor in a device layer over a fully-depleted semiconductor-on-insulator (FD-SOI) substrate, including:
- a gate over the FD-SOI substrate and between a source and a drain;
- and
- a channel under the gate and between a first portion of silicon-germanium (SiGe) and a second portion of SiGe, wherein the channel is of a higher germanium concentration than a germanium concentration of the first portion of SiGe and a germanium concentration of the second portion of SiGe;
- and
- a second transistor in the device layer, including:
- a gate over the FD-SOI substrate and between a source and a drain;
- and
- a channel under the gate, wherein the channel of the second transistor is thinner than the first and second portions of SiGe of the first transistor.
A method of forming an integrated circuit (IC) structure, comprising:
- forming a first transistor over a substrate, including:
- forming a channel including substantially uniformly-graded silicon-germanium (SiGe) within the substrate,
- forming a gate over the channel,
- forming a source region and a drain region on opposing sides of the gate;
- forming a first region of vertically-graded SiGe adjacent a first side of the channel, and
- forming a second region of vertically-graded SiGe adjacent a second side of the channel.
Dependencies are inferred from the claim text.