Semiconductor arrangement and method of manufacture
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYun-Chi WU, Tsung-Yu YANG, Cheng-Bo SHU, Chien Hung LIU
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Abstract
A method of forming a semiconductor arrangement includes forming a gate dielectric layer over a semiconductor layer. A gate electrode layer is formed over the gate dielectric layer. A first gate mask is formed over the gate electrode layer. The gate electrode layer is etched using the first gate mask as an etch template to form a first gate electrode. A first dopant is implanted into the semiconductor layer using the first gate mask and the first gate electrode as an implantation template to form a first doped region in the semiconductor layer.
Claims20
A semiconductor arrangement, comprising:
- a first transistor, comprising:
- a first gate electrode;
- a first sidewall spacer;
- and
- a second sidewall spacer, wherein the second sidewall spacer is separated from the first gate electrode by the first sidewall spacer;
- and
- a second transistor, comprising:
- a second gate electrode;
- and
- the second sidewall spacer, wherein the second sidewall spacer is in contact with the second gate electrode.
A semiconductor arrangement, comprising:
- a first transistor comprising a first gate structure comprising a first sidewall spacer having a first material composition;
- and
- a second transistor comprising a second gate structure, wherein:
- the second gate structure contacts the first gate structure such that an interface is defined between the first gate structure and the second gate structure, and
- the second gate structure comprises a second sidewall spacer having a second material composition different than the first material composition.
A method comprising:
- forming a gate electrode layer;
- forming a first photoresist layer over the gate electrode layer;
- removing a first portion of the first photoresist layer to define a patterned first photoresist layer;
- removing a first portion of the gate electrode layer not underlying the patterned first photoresist layer to define a first gate electrode from a second portion the gate electrode layer;
- removing the patterned first photoresist layer after defining the first gate electrode;
- forming a second photoresist layer over first gate electrode and a third portion of the gate electrode layer;
- removing a first portion of the second photoresist layer to define a patterned second photoresist layer;
- and
- removing a first part of the third portion of the gate electrode layer not underlying the patterned second photoresist layer to define a second gate electrode from a second part of the third portion of the gate electrode layer.
Dependencies are inferred from the claim text.