Semiconductor packages and method for fabricating the same

A semiconductor package comprising:

• a redistribution layer;
• a three-dimensional integrated circuit (3D IC) structure on the redistribution layer, the 3D IC structure comprising a first semiconductor chip die and a second semiconductor chip die below the first semiconductor chip die;
• a plurality of conductive posts on the redistribution layer adjacent to the 3D IC structure;
• a molding material on the redistribution layer and encapsulating the 3D IC structure and the plurality of conductive posts;
• a printed circuit board (PCB) on the molding material;
• and
• a third semiconductor chip die on the PCB,
• wherein a lower surface of each conductive post of the plurality of conductive posts is on the redistribution layer and an upper surface of each conductive post of the plurality of conductive posts is below the PCB, and
• wherein a die attach film (DAF) is between an upper surface of the first semiconductor chip die and the PCB and conductive connection members are between a lower surface of the second semiconductor chip die and the redistribution layer.

A method for fabricating a semiconductor package, comprising:

• forming a plurality of conductive posts on a printed circuit board (PCB);
• forming a three-dimensional integrated circuit (3D IC) structure on the PCB;
• encapsulating the plurality of conductive posts and the 3D IC structure with a molding material;
• forming a front side redistribution layer on the molding material;
• and
• forming external connection terminals on the front side redistribution layer.