3d integrated circuit (3dic) structures and methods for manufacturing the same

A 3D integrated circuit structure, comprising:

• a first redistribution layer structure;
• a molding material on the first redistribution layer structure;
• an interconnection structure on the molding material;
• a first semiconductor chip die in the molding material, wherein the first semiconductor chip die is electrically connected to the first redistribution layer structure and the interconnection structure;
• a plurality of sacrificial pads in the molding material, wherein the plurality of sacrificial pads are electrically connected to the first redistribution layer structure;
• a plurality of conductive posts in the molding material, wherein the plurality of conductive posts are adjacent the first semiconductor chip die, and wherein the plurality of conductive posts are electrically connected to the plurality of sacrificial pads and the interconnection structure;
• and
• a second semiconductor chip die on the interconnection structure,
• wherein the second semiconductor chip die overlaps the first semiconductor chip die and the plurality of conductive posts in a vertical direction.

A method for manufacturing a 3D integrated circuit structure, the method comprising:

• forming a first redistribution layer structure;
• forming a plurality of sacrificial pads on the first redistribution layer structure;
• providing a first semiconductor chip die on the first redistribution layer structure;
• forming a first molding material on the first semiconductor chip die and the plurality of sacrificial pads;
• forming through holes passing through the first molding material on the plurality of sacrificial pads;
• forming a plurality of conductive posts by filling the through holes with a conductive material;
• and
• electrically connecting a second semiconductor chip die to the first semiconductor chip die and to the plurality of conductive posts,
• wherein the second semiconductor chip die overlaps the first semiconductor chip die and the plurality of conductive posts in a vertical direction.