Integrated circuit package and method

A method comprising:

• forming a release layer on a carrier substrate;
• attaching a plurality of integrated circuit dies to the release layer, each die having a contact region with die connectors and a non-contact region devoid of die connectors;
• encapsulating the integrated circuit dies with an encapsulant material;
• forming a dielectric layer over the encapsulant material and the integrated circuit dies;
• forming a metallization pattern on the dielectric layer, the metallization pattern including conductive vias and conductive lines with meandering portions over the non-contact regions and straight portions over the encapsulant material;
• forming dummy conductive features at least partially around the conductive vias and along the conductive lines;
• detaching the carrier substrate from the encapsulated integrated circuit dies;
• and
• forming a redistribution structure on a side of the integrated circuit dies opposite the dielectric layer.

A semiconductor package structure comprising:

• a plurality of integrated circuit dies, each die having a contact region with die connectors and a non-contact region devoid of die connectors;
• an encapsulant to encapsulate the plurality of integrated circuit dies;
• a dielectric layer on the encapsulant and over the integrated circuit dies;
• a metallization pattern on the dielectric layer, comprising:
• conductive vias extending through the dielectric layer and electrically connected to the die connectors;
• conductive lines interconnecting the conductive vias, including:
• straight portions over the encapsulant between adjacent integrated circuit dies;
• and
• meandering portions over the non-contact regions of the integrated circuit dies;
• and
• dummy conductive features in proximity to the conductive vias and along the conductive lines.