Storage devices having enhanced error detection and memory cell repair

A storage device, comprising:

• first and second volatile memories, which respectively include a memory cell array including multiple sub-cell arrays, and sub-wordline driver blocks configured to drive sub-wordlines connected to one or more sub-cell arrays among the plurality of sub-cell arrays;
• and
• a storage controller configured to control the first and second volatile memories;
• wherein the plurality of sub-cell arrays and the sub-wordline driver blocks of the first and second volatile memories have different connection structures relative to each other;
• and
• wherein the storage controller includes:
• a first volatile memory interface configured to transmit data to and receive data from the first volatile memory, and a second volatile memory interface configured to transmit data to and receive data from the second volatile memory;
• a working memory configured to store a first structure map table representing mapping of a unit area, a sub-wordline, and a sub-wordline driver block of the first volatile memory, and a second structure map table representing mapping of a unit area, a sub-wordline, and a sub-wordline driver block of the second volatile memory;
• and
• a processor configured to:
• update error counts for each unit area of the first and second volatile memories to the first and second structure map tables, respectively, detect a defective sub-wordline or a defective sub-wordline driver block by referring to the first and second structure map tables, and repair memory cells connected to the defective sub-wordline or to repair memory cells related to the defective sub-wordline driver block depending on a result of the detection.

A storage device, comprising:

• a volatile memory;
• and
• a storage controller configured to control the volatile memory;
• wherein the volatile memory includes:
• a memory cell array including a plurality of sub-cell arrays including memory cells connected to a plurality of unit wordlines, wherein the plurality of sub-cell arrays are arranged in a first direction, and
• sub-wordline driver blocks adjacent to one or more of the sub-cell arrays in the first direction, and including a plurality of sub-wordline drivers, which are each configured to drive one or more unit wordlines connected to one or more adjacent sub-cell arrays as a single sub-wordline;
• and
• wherein the storage controller is configured to:
• determine memory cells connected to the plurality of unit wordlines as a unit area, detect a defective sub-wordline among the plurality of sub-wordlines based on an error count of one or more unit areas related to the plurality of sub-wordlines included in the volatile memory, and repair one or more unit areas related to the defective sub-wordline depending on a result of the detection.