Memory device
AssigneeKioxia Corporation
InventorHiroshi MAEJIMA
Life of this patent
Estimating the term…
Abstract
According to one embodiment, a memory device includes a substrate, a memory layer, and a circuit layer. The memory layer includes first to third regions arranged in a first direction. The circuit layer includes first and second transfer regions, and first and second sense amplifier regions. The first and second transfer regions are shifted in the first direction and arranged in a second direction. In a third direction, the first sense amplifier region overlaps the first region, and the second sense amplifier region overlaps the second region. The first sense amplifier region and the first transfer region are arranged in the first direction, and the second sense amplifier region and the second transfer region are arranged in the first direction.
Claims21
A memory device comprising:
- a substrate;
- a memory layer;
- and
- a circuit layer including a sense amplifier module provided between the substrate and the memory layer, wherein
- the memory layer includes a first region, a second region, and a third region arranged in a first direction, the third region being located between the first region and the second region,
- each of the first region and the second region includes a plurality of memory cells,
- the circuit layer includes a first transfer region, a second transfer region, a first sense amplifier region, and a second sense amplifier region,
- the first transfer region includes a first row decoder coupled to part of the plurality of memory cells via contacts provided in the third region, the first row decoder is configured to apply a voltage to part of the plurality of memory cells,
- the second transfer region includes a second row decoder coupled to another part of the plurality of memory cells via the contacts, the second row decoder is configured to apply a voltage to said another part of the plurality of memory cells,
- the sense amplifier module is configured to read data from the plurality of memory cells, the sense amplifier module includes a first sense amplifier unit and a second sense amplifier unit,
- the first sense amplifier region includes the first sense amplifier unit, and the second sense amplifier region includes the second sense amplifier unit,
- the first transfer region and the second transfer region are shifted in the first direction and arranged in a second direction intersecting the first direction,
- in a third direction intersecting both the first direction and the second direction, the first sense amplifier region overlaps the first region, and the second sense amplifier region overlaps the second region, and
- the first sense amplifier region and the first transfer region are arranged in the first direction, and the second sense amplifier region and the second transfer region are arranged in the first direction.
Dependencies are inferred from the claim text.