Graphics processor data access and sharing

An apparatus comprising:

• a plurality of processors, including a plurality of graphics processing units (GPUs);
• a shared memory accessible to each of the plurality of GPUs, wherein the shared memory includes at least a first memory associated with a first GPU of the plurality of GPUs and a second memory associated with a second GPU of the plurality of GPUs;
• wherein the plurality of processors are to:
• identify data usages for the plurality of GPUs,
• determine a preferred data access structure for access by the plurality of GPUs based at least in part on the identified data usages, and
• establish a masking structure to implement the preferred data access structure for access by the plurality of GPUs.

A method comprising:

• identifying data usages for a plurality of graphics processing units (GPUs) in a computing system, the computing system including a shared memory accessible to each of the plurality of GPUs, wherein the shared memory includes at least a first memory associated with a first GPU of the plurality of GPUs and a second memory associated with a second GPU of the plurality of GPUs;
• determining a preferred data access structure for access by the plurality of GPUs based at least in part on the identified data usages;
• and
• establishing a masking structure to implement the preferred data access structure for access by the plurality of GPUs.

One or more non-transitory computer-readable storage mediums having stored thereon executable computer program instructions that, when executed by one or more processors, cause the one or more processors to perform operations comprising:

• identifying data usages for a plurality of graphics processing units (GPUs) in a computing system, the computing system including a shared memory accessible to each of the plurality of GPUs, wherein the shared memory includes at least a first memory associated with a first GPU of the plurality of GPUs and a second memory associated with a second GPU of the plurality of GPUs;
• determining a preferred data access structure for access by the plurality of GPUs based at least in part on the identified data usages;
• and
• establishing a masking structure to implement the preferred data access structure for access by the plurality of GPUs.