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US 2024/0256473 A1Published application
Neuromorphic memory device and method
AssigneeMicron Technology, Inc.
InventorsBrent Keeth, Frank F Ross, Richard C Murphy
Life of this patent
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Abstract
Apparatus and methods are disclosed, including memory devices and systems. Example memory devices, systems and methods include a stack of memory dies, a controller die, and a buffer. Example memory devices, systems and methods include one or more neuromorphic layers logically coupled between one or more dies in the stack of memory dies and a host interface of the controller die.
Claims20
A memory system, comprising:
- a controller die coupled to a substrate, the controller die including a buffer, the buffer including a host interface and a die stack interface, wherein the host interface includes at least one channel that is mapped to two or more sub-channels of the die stack interface;
- a stack of memory dies supported by the substrate and coupled to the two or more sub-channels;
- and
- one or more neuromorphic layers logically coupled between one or more dies in the stack of dies and the host interface.
1 more element
A memory system, comprising:
- a controller die coupled to a substrate, the controller die including a buffer, the buffer including a host interface and a die stack interface, wherein the host interface includes at least one channel that is mapped to two or more sub-channels of the die stack interface;
- a stack of memory dies supported by the substrate and coupled to the two or more sub-channels;
- one or more neuromorphic layers logically coupled between one or more dies in the stack of dies and the host interface;
- and
- logic in the controller die to program one or more neuromorphic weights into the one or more neuromorphic layers.
2 more elements
The memory system of 13, wherein the one or more neuromorphic layers includes multiple layers in a single die.
Dependencies are inferred from the claim text.