Pseudocode to Hardware Description Language (HDL) Translation

A system for translating natural language to a hardware description language (HDL), comprising:

• a natural language parser configured to parse pseudocode statements, which include natural-language terms for a high-level representation of hardware behavior, wherein the natural language parser extracts context relationships between the pseudocode statements;
• a graph manager to write each line of pseudocode into a node in a context dependency graph and to order the graph based on the context relationships identified for the pseudocode statements;
• a deep neural network to translate the pseudocode from nodes of the context dependency graph into HDL code chunks;
• a composer to arrange the HDL code chunks based on dependencies in the context dependency graph in order to provide a listing of HDL source code.

A machine-readable storage medium having instructions embodied thereon, the instructions when executed by one or more processors, cause the one or more processors to perform a process comprising:

• receiving a plurality of pseudocode statements that include natural-language terms for a high-level representation of hardware behavior;
• extracting context information from the pseudocode statements based in part on a context relationships defined in a pseudocode statement file between parent pseudocode statements and an inner context pseudocode statements;
• storing each line of pseudocode into a node in a context dependency graph and ordering the graph based on the context relationships in the context information;
• translating the pseudocode of each node from the context dependency graph into HDL code modules using a deep neural network;
• and
• ordering the HDL code modules based on the context dependency graph to provide a listing of HDL source code.