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US 2024/0243569 A1Published application
Trigger Circuit for Controlling an ESD Protection Switch
AssigneeNexperia B.V.
InventorsWalter Luis Tercariol, Justin Philpott
Life of this patent
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Abstract
A trigger circuit for controlling a electrostatic discharge (ESD), protection switch is provided. The present disclosure further relates to a high-voltage trigger circuit for use in eFuse (electronic fuse), load switch or ideal diode applications, or in any other application with a large n-channel FET between two pins. The trigger circuit ensures that the ESD protection gate can be left floating after the ESD event.
Claims18
A trigger circuit for controlling an electrostatic discharge (ESD) protection switch;
- the trigger circuit comprising:
- an input terminal arranged to be connected with a first conduction terminal of the ESD protection switch;
- an output terminal arranged to control a control terminal of the ESD protection switch;
- a first diode function biased from the output terminal to the input terminal;
- a second diode function biased from the input terminal to the output terminal and connected in series with the first diode function;
- a first transistor having two conduction terminals and a control terminal;
- wherein the two conduction terminals of the first transistor are arranged in parallel with the first diode function, and wherein the control terminal of the first transistor is configured to control a conduction path between the two conduction terminals of the first transistor;
- a first timer circuit comprising a first resistor connected in series between the control terminal of the first transistor and the output terminal;
- and
- a first capacitor connected in series between the control terminal of the first transistor and the input terminal;
- wherein the second diode function is connected in series between the input terminal and one of the two conduction terminals of the first transistor;
- wherein the control terminal of the first transistor is coupled via the first capacitor to the input terminal, so that a rising voltage at the input terminal due to an ESD event triggers the control terminal of the first transistor to activate the conduction path between the two conduction terminals of the first transistor;
- and
- wherein the first capacitor is arranged to be discharged through the first resistor to the output terminal so that, when the first capacitor is discharged below a first threshold of the first transistor, the control terminal of the first transistor deactivates the conduction path between the two conduction terminals of the first transistor.
11 more elements
Dependencies are inferred from the claim text.