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US 2024/0235572 A9Published application
Analog-to-digital converter (adc) architectures for high resolution and energy efficiency
AssigneeArizona Board of Regents on behalf of Arizona State University
InventorArindam SANYAL
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Abstract
A low-pass and band-pass delta-sigma (ΔΣ) analog-to-digital converter (ADC) device for sensor interface is disclosed. The device includes a first stage comprising a low-resolution passive integrator-based noise-shaping successive approximation register (SAR) ADC and a second stage comprising a voltage-controlled oscillator (VCO)-ADC.
Claims18
A low-pass and band-pass delta-sigma (ΔΣ) analog-to-digital converter (ADC) device for sensor interface, the device comprising:
- a first stage comprising a low-resolution passive integrator-based noise-shaping successive approximation register (SAR) ADC;
- and
- a second stage comprising a voltage-controlled oscillator (VCO)-ADC.
A low-pass and band-pass delta-sigma (ΔΣ) analog-to-digital converter (ADC) system, the system comprising:
- a first stage comprising a low-resolution passive integrator-based noise-shaping successive approximation register (SAR) ADC;
- a second stage comprising a voltage-controlled oscillator (VCO)-ADC;
- and
- an artificial intelligence or a machine learning engine that is programmed to communicate with either the first stage or the second stage.
1 more element
A radio comprising:
- band-pass delta-sigma (ΔΣ) analog-to-digital converter (ADC);
- a first stage comprising a low-resolution passive integrator-based noise-shaping successive approximation register (SAR) ADC;
- and
- a second stage comprising a voltage-controlled oscillator (VCO)-ADC
1 more element
Dependencies are inferred from the claim text.