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US 2024/0213981 A1Published application
Multi-channel multiplexer
AssigneeTexas Instruments Incorporated
InventorsNitin AGARWAL, Kunal Suresh KARANJKAR, Venkata Ramanan R
Life of this patent
Estimating the term…
Abstract
A circuit includes a first switch assembly having a first input node and a first output node, and a second switch assembly having a second input node and a second output node. The circuit further includes a third switch assembly an operational amplifier, and a buffer. The third switch assembly has a third input node and a third output node. The third input node is coupled to the second output node, and the third output node is coupled to the first output node. The buffer has a buffer input and a buffer output. The buffer input is coupled to an input stage of the operational amplifier. The buffer output is coupled to the third switch assembly.
Claims20
A circuit, comprising:
- a first switch assembly having a first switch, a second switch, and a third switch, the first and second switches coupled in series through an internal node, the third switch coupled to the internal node, the third switch configured to be turned off based on the first and second switches being turned on, and the third switch configured to be turned on based on the first and second switches being turned off;
- a second switch assembly having a first switch, a second switch, and a third switch, the first and second switches coupled in series through an internal node, the third switch coupled to the internal node, the third switch configured to be turned off based on the first and second switches being turned on, the third switch configured to be turned on based on the first and second switches being turned off, and the first and second switches configured to be turned off based on the first and second switches of the first switch assembly being turned on;
- and
- a buffer having an input and an output, the input coupled to the second switch of the first switch assembly and the second switch of the second switch assembly, and the output coupled to the third switch of the first switch assembly and the third switch of the second switch assembly.
1 more element
A system, comprising:
- a first switch assembly having a first switch, a second switch, and a third switch, the first and second switches coupled in series through an internal node, and the third switch coupled to the internal node;
- a second switch assembly having a first switch, a second switch, and a third switch, the first and second switches coupled in series through an internal node, and the third switch coupled to the internal node;
- a buffer having an input and an output, the input coupled to the second switch of the first switch assembly and the second switch of the second switch assembly, and the output coupled to the third switch of the first switch assembly and the third switch of the second switch assembly;
- and
- a controller configured to:
- turn off the third switch of the first switch assembly based on the first and second switches of the first switch assembly being turned on, and turn on the third switch of the first switch assembly based on the first and second switches of the first switch assembly being turned off;
- turn off the third switch of the second switch assembly based on the first and second switches of the second switch assembly being turned on, and turn on the third switch of the second switch assembly based on the first and second switches of the second switch assembly being turned off;
- and
- turn off the first and second switches of the second switch assembly based on the first and second switches of the first switch assembly being turned on.
6 more elements
A circuit, comprising:
- a first switch assembly having a first switch, a second switch, and a third switch, the first and second switches coupled in series through an internal node, and the third switch coupled to the internal node;
- a second switch assembly having a first switch, a second switch, and a third switch, the first and second switches coupled in series through an internal node, and the third switch coupled to the internal node;
- a third switch assembly having a first switch, a second switch, and a third switch, the first and second switches coupled in series through an internal node, the third switch coupled to the internal node, and the first switch coupled to the second switch of the first switch assembly and the second switch of the second switch assembly;
- and
- a buffer having an input and an output, the input coupled to the second switch of the third switch assembly, and the output coupled to the third switch of the third switch assembly.
2 more elements
Dependencies are inferred from the claim text.