# US 2024/0206346 A1 · Mram with a multi-component, multi-layer bottom electrode

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- Number: US 2024/0206346 A1
- Document ID: US20240206346A1
- Status: Published application
- Kind: A1
- Application number: 18/081,960
- Filed: 2022-12-15
- Published: 2024-06-20
- Earliest claimed: 2022-12-15
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Shravana Kumar Katakam; Ashim Dutta; Chih-Chao Yang
- Web page: https://patentgrep.com/patent/US20240206346A1

## CPC

- H10N 50/80: Constructional details
- H10B 61/00: Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
- H10N 50/01: Manufacture or treatment
- H10N 50/10: Magnetoresistive devices
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

A magnetoresistive random access memory (MRAM) structure, a system, and a method of forming an MRAM structure. The MRAM structure may include a bottom electrode. The bottom electrode may include a diffusion barrier. The bottom electrode may further include a dielectric that surrounds one or more sidewalls of the diffusion barrier. The method may include depositing a first dielectric, where a metal component remains uncovered by the dielectric. The method may further include depositing a diffusion barrier on at least the metal component. The method may further include depositing an electrode layer on the first dielectric and the diffusion barrier, resulting in a bottom electrode comprising the electrode layer, the first dielectric, and the diffusion barrier.

## Claims

### Claim 1

A magnetoresistive random access memory (MRAM) structure, wherein the MRAM structure comprises:
a bottom electrode, the bottom electrode comprising:
a diffusion barrier; and
a dielectric that surrounds one or more sidewalls of the diffusion barrier.

### Claim 2 (depends on 1)

The MRAM structure of claim 1, wherein the diffusion barrier has a high sticking coefficient.

### Claim 3 (depends on 2)

The MRAM structure of claim 2, wherein the diffusion barrier comprises at least one of TaN and Ru.

### Claim 4 (depends on 1)

The MRAM structure of claim 1, further comprising an electrode layer.

### Claim 5 (depends on 1)

The MRAM structure of claim 1, further comprising:
an MRAM stack, wherein the MRAM stack comprises one or more stacks of ferromagnetic plates and insulator layers.

### Claim 6 (depends on 1)

The MRAM structure of claim 1, wherein the dielectric comprises at least one of aluminum oxide, hafnium oxide, silicon oxide, SiN, and SiCN.

### Claim 7 (depends on 1)

The MRAM structure of claim 1, wherein the diffusion barrier has a thickness between 10 nm and 50 nm.

### Claim 8

A system, wherein the system comprises:
a magnetoresistive random access memory (MRAM) structure, the MRAM structure comprising:
a bottom electrode, the bottom electrode comprising:
a diffusion barrier, and
a dielectric that surrounds one or more sidewalls of the diffusion barrier;
an MRAM stack; and
a top electrode.

### Claim 9 (depends on 8)

The system of claim 8, wherein the diffusion barrier has a high sticking coefficient.

### Claim 10 (depends on 8)

The system of claim 8, wherein the bottom electrode further comprises an electrode layer.

### Claim 11 (depends on 8)

The system of claim 8, wherein the diffusion barrier comprises at least one of TaN and Ru.

### Claim 12 (depends on 8)

The system of claim 8, wherein the diffusion barrier has a thickness between 10 nm and 50 nm.

### Claim 13 (depends on 8)

The system of claim 8, further comprising a metal component, wherein the metal component is capped by the diffusion barrier.

### Claim 14 (depends on 13)

The system of claim 13, wherein the diffusion barrier has a width less than or equal to the metal component.

### Claim 15

A method of forming a magnetoresistive random access memory (MRAM) structure, the method comprising:
depositing a first dielectric, wherein a metal component remains uncovered by the dielectric;
depositing a diffusion barrier on at least the metal component; and
depositing an electrode layer on the first dielectric and the diffusion barrier, resulting in a bottom electrode comprising the electrode layer, the first dielectric, and the diffusion barrier.

### Claim 16 (depends on 15)

The method of claim 15, wherein the first dielectric surrounds one or more sidewalls of the diffusion barrier.

### Claim 17 (depends on 15)

The method of claim 15, further comprising:
forming an MRAM stack connected to the electrode layer; and
depositing a top electrode on the MRAM stack.

### Claim 18 (depends on 17)

The method of claim 17, wherein forming the MRAM stack comprises depositing ferromagnetic plates and insulator layers, such that each ferromagnetic plates is separated by an insulator layer.

### Claim 19 (depends on 17)

The method of claim 17, further comprising:
forming an MRAM pillar by patterning the electrode layer, the first dielectric, the diffusion barrier, the MRAM stack, and the top electrode into a pillar shape.

### Claim 20 (depends on 17)

The method of claim 17, further comprising:
depositing a second dielectric to encapsulate exposed portions of the top electrode, the MRAM stack, the electrode layer, and the first dielectric.