# US 2024/0202072 A1 · Hardware Memory Error Tolerant Software System

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- Number: US 2024/0202072 A1
- Document ID: US20240202072A1
- Status: Published application
- Kind: A1
- Application number: 18/594,656
- Filed: 2024-03-04
- Published: 2024-06-20
- Earliest claimed: 2021-12-15
- Assignees: Google Inc.
- Applicants: Google LLC
- Inventors: Jue Wang; Daniel Ryan Vance
- Web page: https://patentgrep.com/patent/US20240202072A1

## CPC

- G06F 11/1068: {in sector programmable memories, e.g. flash disk (G06F11/1072 takes precedence)}
- G06F 11/261: {by simulating additional hardware, e.g. fault simulation}
- G06F 11/073: {in a memory management context, e.g. virtual memory or cache management (memory management G06F12/00; testing of static memory units G11C29/00)}
- G06F 11/076: {by exceeding a count or rate limit, e.g. word- or bit count limit}
- G06F 11/0766: {Error or fault reporting or storing}
- G06F 11/0772: {Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers}
- G06F 11/141: {for bus or memory accesses}
- G06F 12/0238: {Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory}
- G06F 12/0882: Page mode
- G06F 11/0778: {Dumping, i.e. gathering error/state information after a fault for later diagnosis}
- G06F 2201/84: Using snapshots, i.e. a logical point-in-time copy of the data
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Systems and methods that enable hardware memory error tolerant software systems. For instance, the system may comprise a host device that instantiates a kernel agent in response to one or more requests to access hardware memory, determines, by the kernel agent based on the received information, whether the request to access memory will cause access to a corrupt memory location, and skip an operation associated with the corrupt memory location in response to determining that the request will access a corrupt memory location. The systems may also include a system that detects software vulnerabilities to hardware memory errors.

## Claims

### Claim 1

A hardware memory error tolerant software system, comprising:
one or more processing devices;
an input for receiving information indicating memory locations at which hardware memory errors are detected; and
a memory storing instructions that cause the one or more processing devices to:
instantiate a kernel agent in response to one or more requests to access memory, the kernel agent determining based on the received information whether the request to access memory will cause access to a corrupt memory location, and
skip an operation associated with the corrupt memory location in response to a determination that the request will access a corrupt memory location.