# US 2024/0202067 A1 · Storage device and method of operating the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2024/0202067 A1 - Document ID: US20240202067A1 - Status: Published application - Kind: A1 - Application number: 18/223,124 - Filed: 2023-07-18 - Published: 2024-06-20 - Earliest claimed: 2022-12-16 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Seonghyeog CHOI; Changkyu Seol; Dong Kim; Inhoon Park; Jinsoo Lim; Youngdon Choi; Junghwan Choi - Web page: https://patentgrep.com/patent/US20240202067A1 ## CPC - G06F 11/10: Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's - G06F 11/1048: {using arrangements adapted for a specific error detection or correction feature} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A method of operating a storage device includes: periodically performing a patrol read operation on a memory device; storing failure information according to the patrol read operation in a buffer memory; generating an uncorrectable error as a result of a first error correction operation performed on read data of the memory device; loading the failure information from the buffer memory; and performing a second error correction operation on the read data by using the failure information. ## Claims ### Claim 1 A method of operating a storage device, comprising: periodically performing a patrol read operation on a memory device; storing failure information according to the patrol read operation in a buffer memory; generating an uncorrectable error as a result of a first error correction operation performed on read data of the memory device; loading the failure information from the buffer memory; and performing a second error correction operation on the read data by using the failure information. ### Claim 2 (depends on 1) The method of claim 1, wherein the failure information comprises sub wordline failure information, sub wordline driver failure information, or on-die error correction history information. ### Claim 3 (depends on 1) The method of claim 1, wherein the buffer memory comprises at least one of a dynamic random access memory (DRAM), a static random access memory (SRAM), a NAND flash memory, or a serial NOR (SNOR) flash memory. ### Claim 4 (depends on 1) The method of claim 1, wherein the first error correction operation and the second error correction operation have different correction capabilities from each other. ### Claim 5 (depends on 1) The method of claim 1, wherein the performing the second error correction operation comprises determining an erasure by using the failure information. ### Claim 6 (depends on 1) The method of claim 1, further comprising setting an error and erasure decoder mode to perform the second error correction operation. ### Claim 7 (depends on 1) The method of claim 1, further comprising reporting error information when an uncorrectable error has occurred as a result of the second error correction operation. ### Claim 8 (depends on 1) The method of claim 1, wherein each of the first error correction operation and the second error correction operation performs error correction using a Reed Solomon code. ### Claim 9 (depends on 1) The method of claim 1, wherein the first error correction operation determines a correction capability according to an error count, and the second error correction operation determines a correction capability according to the error count and an erasure count. ### Claim 10 (depends on 1) The method of claim 1, wherein the storage device comprises a controller configured to control at least one non-volatile memory device and at least one volatile memory device, wherein the controller controls the memory device by using a memory manager. ### Claim 11 A storage device, comprising: at least one non-volatile memory device; a memory device; and a controller configured to control the at least one non-volatile memory device, wherein the controller periodically collects failure information of the memory device through a patrol read operation, and determines an erasure using the failure information, wherein the controller performs an error correction operation on read data by using the determined erasure. ### Claim 12 (depends on 11) The storage device of claim 11, wherein the controller comprises a non-volatile memory controller and a memory controller, wherein the non-volatile memory controller controls the at least one non-volatile memory device, and the memory controller controls the memory device, wherein the memory controller performs the error correction operation on the read data. ### Claim 13 (depends on 11) The storage device of claim 11, wherein the controller further comprises a buffer memory configured to store the failure information. ### Claim 14 (depends on 11) The storage device of claim 11, wherein the controller further comprises a processor configured to drive a memory manager that controls the patrol read operation. ### Claim 15 (depends on 11) The storage device of claim 11, wherein the wherein the controller sets an error and erasure decoder mode to perform the error correction operation according to an internal policy or an external request. ### Claim 16 A method of operating a storage device, comprising: performing a first error correction operation on read data of a memory device; and performing a second error correction operation by using failure information of the memory device when an error of the read data is uncorrectable as determined by the first error correction operation. ### Claim 17 (depends on 16) The method of claim 16, wherein the performing the first error correction operation comprises performing an error correction operation based on an error count. ### Claim 18 (depends on 16) The method of claim 16, wherein the performing the second error correction operation comprises performing an error correction operation based on an error count and an erasure count. ### Claim 19 (depends on 18) The method of claim 18, wherein the performing the second error correction operation further comprises setting an erasure by using the failure information. ### Claim 20 (depends on 16) The method of claim 16, further comprising collecting the failure information for the memory device. ### Claim at position 21 21-25. (canceled)