# US 2024/0202056 A1 · Methods for activity-based memory maintenance operations and memory devices and systems employing the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2024/0202056 A1 - Document ID: US20240202056A1 - Status: Published application - Kind: A1 - Application number: 18/591,922 - Filed: 2024-02-29 - Published: 2024-06-20 - Earliest claimed: 2018-12-21 - Assignees: Lodestar Licensing Group LLC - Applicants: Lodestar Licensing Group LLC - Inventors: Dean D. Gans - Web page: https://patentgrep.com/patent/US20240202056A1 ## CPC - G06F 11/076: {by exceeding a count or rate limit, e.g. word- or bit count limit} - G06F 11/3037: {where the computing system component is a memory, e.g. virtual memory, cache (accessing, addressing or allocating within memory systems or architectures G06F12/00; checking stores for correct operation G11C29/00)} - G06F 12/0238: {Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory} - G06F 12/0246: {in block erasable memory, e.g. flash memory} - G06F 13/1668: {Details of memory controller} - G11C 7/1093: {Input synchronization} - G11C 11/2257: {Word-line or row circuits} - G11C 11/2277: {Verifying circuits or methods} - G11C 29/04: Detection or location of defective memory elements {, e.g. cell constructio details, timing of test signals} - G06F 2212/7205: Cleaning, compaction, garbage collection, erase control - G06F 2212/7211: Wear leveling - G11C 7/225: {Clock input buffers} - G11C 16/349: {Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles} - G11C 29/52: Protection of memory contents; Detection of errors in memory contents - G11C 2029/0409: {Online test} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract Memory devices and methods of operating memory devices in which maintenance operations can be scheduled on an as-needed basis for those memory portions where activity (e.g., operations in excess of a predetermined threshold) warrants a maintenance operation are disclosed. In one embodiment, an apparatus comprises a memory including a memory location, and circuitry configured to determine a count corresponding to a number of operations at the memory location, to schedule a maintenance operation for the memory location in response to the count exceeding a first predetermined threshold, and to decrease the count by an amount corresponding to the first predetermined threshold in response to executing the scheduled maintenance operation. The circuitry may be further configured to disallow, in response to determining that the count has reached a maximum permitted value, further operations at the memory location until after the count has been decreased. ## Claims ### Claim 1 An apparatus, comprising: a dynamic random access memory (DRAM) device comprising one or more memory banks; and a controller coupled with the DRAM device and configured to cause the apparatus to: receive one or more activation (ACT) commands at the DRAM device; increment a rolling accumulated ACT (RAA) count based at least in part on receiving the one or more ACT commands; storing an RAA count threshold in a mode register associated with the DRAM device; receive a refresh maintenance command based at least in part on determining that the RAA count satisfies the RAA count threshold; and decrement the RAA count based at least in part on receiving the refresh maintenance command. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the controller is further configured to cause the apparatus to: prohibit one or more additional ACT commands based at least in part on determining that the RAA count satisfies a RAA maximum management threshold (RAAMMT), wherein receiving the refresh maintenance command is based at least in part on prohibiting the one or more additional ACT commands. ### Claim 3 (depends on 2) The apparatus of claim 2, wherein the controller is further configured to cause the apparatus to: permit the one or more additional ACT commands based at least in part on decrementing the RAA count. ### Claim 4 (depends on 2) The apparatus of claim 2, wherein the controller is further configured to cause the apparatus to: store the RAA maximum management threshold (RAAMMT) in the mode register associated with the DRAM device. ### Claim 5 (depends on 1) The apparatus of claim 1, wherein the controller is further configured to cause the apparatus to: perform a refresh operation based at least in part on receiving the refresh maintenance command, wherein decrementing the RAA count is based at least in part on performing the refresh operation. ### Claim 6 (depends on 1) The apparatus of claim 1, wherein the controller is further configured to cause the apparatus to: determining whether the RAA count satisfies the RAA count threshold based at least in part on comparing the RAA count to the RAA count threshold. ### Claim 7 (depends on 1) The apparatus of claim 1, wherein the one or more ACT commands are each associated with activating a respective memory bank of the one or more memory banks. ### Claim 8 (depends on 7) The apparatus of claim 7, wherein the RAA count threshold is associated with a quantity of ACT commands permitted for a memory bank of the one or more memory banks. ### Claim 9 (depends on 1) The apparatus of claim 1, wherein to decrement the RAA count, the controller is configured to cause the apparatus to: decrement the RAA count by a predetermined quantity associated with the RAA count threshold. ### Claim 10 (depends on 1) The apparatus of claim 1, wherein the refresh maintenance command initiates a refresh operation for a single memory bank of the one or more memory banks. ### Claim 11 (depends on 10) The apparatus of claim 10, wherein the RAA count is decremented for the single memory bank associated with the refresh maintenance command. ### Claim 12 (depends on 1) The apparatus of claim 1, the controller is further configured to cause the apparatus to: maintain a plurality of RAA counts each associated with a respective memory bank of the one or more memory banks, wherein the RAA count is one of the plurality of RAA counts, and wherein incrementing the RAA count is based at least in part on receiving an ACT command for a memory bank associated with the RAA count. ### Claim 13 A method comprising: storing a rolling accumulated activation (RAA) maximum management threshold (RAAMMT) in a mode register associated with a dynamic random access memory (DRAM) device; determining whether an RAA count maintained at the DRAM device satisfies the RAAMMT based at least in part on receiving one or more activation (ACT) commands; prohibiting one or more additional ACT commands based at least in part on determining that the RAA count satisfies the RAAMMT; receiving a refresh maintenance command based at least in part on determining that the RAA count satisfies the RAAMMT; decrementing the RAA count based at least in part on receiving the refresh maintenance command; and permitting the one or more additional ACT commands based at least in part on decrementing the RAA count. ### Claim 14 (depends on 13) The method of claim 13, further comprising: receiving the one or more ACT commands at the DRAM device. ### Claim 15 (depends on 14) The method of claim 14, further comprising: incrementing the RAA count based at least in part on receiving the one or more ACT commands, wherein determining whether the RAA count satisfies the RAAMMT is based at least in part on incrementing the RAA count. ### Claim 16 (depends on 13) The method of claim 13, further comprising: performing a refresh operation based at least in part on receiving the refresh maintenance command, wherein decrementing the RAA count is based on at least in part on performing the refresh operation. ### Claim 17 (depends on 13) The method of claim 13, wherein decrementing the RAA count comprises: decrementing the RAA count by a predetermined quantity associated with the refresh maintenance command. ### Claim 18 A method, comprising: transmitting one or more activation (ACT) commands to a dynamic random access memory (DRAM) device; storing a rolling accumulated activation (RAA) maximum management threshold (RAAMMT) to a mode register associated with the DRAM device; determining whether at least one ACT command of the one or more ACT commands was prevented from being performed at the DRAM device; transmitting a refresh maintenance command based at least in part on determining that the at least one ACT command of the one or more ACT commands was prevented from being performed; and transmitting one or more additional ACT commands based at least in part on transmitting the refresh maintenance command. ### Claim 19 (depends on 18) The method of claim 18, wherein the one or more ACT commands are each associated with activating a respective memory bank of the DRAM device. ### Claim 20 (depends on 18) The method of claim 18, wherein the refresh maintenance command is associated with refreshing a memory bank of the DRAM device.