# US 2024/0202038 A1 · Hardware integrated, priority-encoded domains

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- Number: US 2024/0202038 A1
- Document ID: US20240202038A1
- Status: Published application
- Kind: A1
- Application number: 18/067,446
- Filed: 2022-12-16
- Published: 2024-06-20
- Earliest claimed: 2022-12-16
- Assignees: NXP USA, Inc.
- Applicants: NXP USA, Inc.
- Inventors: Gareth Owen Shelley; David McDaid; Steven Bruce McAslan
- Web page: https://patentgrep.com/patent/US20240202038A1

## CPC

- G06F 9/5038: {considering the execution order of a plurality of tasks, e.g. taking priority or time dependency constraints into consideration (scheduling strategies G06F9/4881 and subgroups)}
- G06F 9/45558: {Hypervisor-specific management and integration aspects}
- G06F 9/5027: {the resource being a machine, e.g. CPUs, Servers, Terminals}
- G06F 12/1441: {for a range}
- G06F 12/1483: {using an access-table, e.g. matrix or list}
- H04L 63/102: {Entity profiles}
- G06F 12/1491: {in a hierarchical protection system, e.g. privilege levels, memory rings}
- G06F 2009/45587: {Isolation or security of virtual machine instances}
- G06F 2212/1016: Performance improvement
- G06F 2212/1032: Reliability improvement, data loss prevention, degraded operation etc
- G06F 2212/1052: Security improvement
- G06F 2212/152: Virtualized environment, e.g. logically partitioned system
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

Systems and methods for priority encoded domains in an SoC have been described. In an illustrative, non-limiting embodiment, a processing system in an SoC, may include: a core, and a domain access controller coupled to the core. The domain access controller may be configured to: receive a resource transaction request from a master device associated with a software-defined processing domain, and process the resource transaction request based upon a priority level of the software-defined processing domain. The domain access controller may also order a plurality of resource transaction requests based upon the associated respective priority levels, and provide the resource transaction requests to resources based on the order. A hypervisor can also use the priority levels of the software-defined processing domains to allocate a plurality of virtual machines to a plurality of processing cores according to the priority levels.

## Claims

### Claim 1

A System-on-Chip (SoC), comprising:
a core; and
a domain access controller coupled to the core, wherein the domain access controller is configured to:
receive a resource transaction request from a master device associated with a software-defined processing domain; and
process the resource transaction request, at least in part, based upon a priority level of the software-defined processing domain.

### Claim 2 (depends on 1)

The SoC of claim 1 comprising a plurality of software-defined processing domains, wherein each of the plurality of software-defined processing domains is associated with a respective domain identifier and a respective priority level, and wherein the resource transaction request comprises a domain identifier associated with the software-defined processing domain.

### Claim 3 (depends on 2)

The SoC of claim 2, wherein the domain access controller is further configured to determine, for the resource transaction request, at least one of:
that the domain identifier of the resource transaction request matches a domain identifier of a resource to which the resource transaction request is addressed; or
that access rights of one of the software-defined processing domain matches access rights of the resource.

### Claim 4 (depends on 1)

The SoC of claim 1, wherein the domain access controller is further configured to:
receive a plurality of resource transaction requests, including the resource transaction request, associated with a plurality of software-defined processing domains, including the software-defined processing domain, and addressed to a resource coupled to the domain access controller, wherein each software-defined processing domain is associated with a respective priority level; and
wherein to process the resource transaction request, at least in part, based upon the priority level of the software-defined processing domain, the domain access controller is further configured to:
order the plurality of resource transaction requests based upon the associated respective priority levels; and
provide the resource transaction requests to the resource based on the order.

### Claim 5 (depends on 4)

The SoC of claim 4, wherein the resource comprises a memory resource or a remote peripheral resource, and wherein the resource transaction requests comprise memory transactions or access requests for the remote peripheral.

### Claim 6 (depends on 2)

The SoC of claim 2, further comprising a plurality of cores and a hypervisor, wherein the plurality of software-defined processing domains comprise a plurality of virtual machines, and wherein the hypervisor is configured to allocate the plurality of virtual machines to the plurality of cores according to a corresponding priority level of each respective virtual machine.

### Claim 7 (depends on 6)

The SoC of claim 6, wherein the hypervisor is further configured to:
determine that a first virtual machine of the plurality of virtual machines awaits access to one of the plurality of cores;
determine that a first priority level associated with the first virtual machine is greater than a second priority level associated with a second virtual machine of the plurality of virtual machines currently allocated to a first core of the plurality of cores;
deallocate, from the first core, the second virtual machine whose associated second priority level is less than the first priority level associated with the first virtual machine; and
allocate the first virtual machine to the first core.

### Claim 8 (depends on 2)

The SoC of claim 2, further comprising a plurality of cores and an operating system, wherein the plurality of software-defined processing domains comprise a plurality of applications managed by the operating system, and wherein the operating system is configured to allocate the plurality of applications to the plurality of cores according to a corresponding priority level of each of the applications.

### Claim 9 (depends on 8)

The SoC of claim 8, wherein the operating system is further configured to:
determine that a first application of the plurality of applications awaits access to one of the plurality of cores;
determine that a first priority level associated with the first application is greater than a second priority level associated with a second application of the plurality of applications currently allocated to a first core the plurality of cores;
deallocate, from the first core, the second application whose associated second priority level is less than the first priority level associated with the first application; and
allocate the first application to the first core.

### Claim 10 (depends on 1)

The SoC of claim 1, further comprising a plurality of resources, wherein a distinct domain access controller is coupled to each of the plurality of resources.

### Claim 11 (depends on 2)

The SoC of claim 2, further comprising a plurality of resources, wherein each domain identifier for each of the plurality of software-defined processing domains is associated with one or more of the resources.

### Claim 12 (depends on 2)

The SoC of claim 2, wherein the master device comprises a memory configured to store the respective domain identifier and the respective priority level for each of the plurality of software-defined processing domains.

### Claim 13 (depends on 1)

The SoC of claim 1, further comprising a plurality of cores, wherein at least two of the plurality of cores are configured to execute different operating systems.

### Claim 14

A method, comprising:
receiving, at a domain access controller, a plurality of resource transactions issued by a plurality of master devices, wherein each of the plurality of master devices is associated with a respective one of a plurality of software-defined processing domains, and wherein each of the plurality of software-defined processing domains is associated with a priority attribute;
re-ordering the plurality of resource transactions, by the domain access controller, based upon the priority attributes; and
executing the re-ordered resource transactions.

### Claim 15 (depends on 14)

The method of claim 14, wherein each resource transaction of the received plurality of resource transactions further indicates a domain identifier of the corresponding software-defined processing domain that sent that resource transaction, and wherein executing the re-ordered resource transactions further comprises, for each resource transaction, at least one of:
determining, by the domain access controller, that the domain identifier of the resource transaction matches a domain identifier of a given resource addressed by the resource transaction; or
determining, by the domain access controller, that access rights of the corresponding software-defined processing domain that sent that resource transaction to the given resource matches access rights of the given resource.

### Claim 16 (depends on 14)

The method of claim 14, wherein the plurality of software-defined processing domains comprise a plurality of virtual machines, the method further comprising:
allocating, by a hypervisor, the plurality of virtual machines to a plurality of cores according to the priority attributes of the plurality of software-defined processing domains.

### Claim 17 (depends on 14)

The method of claim 14, wherein the plurality of software-defined processing domains comprise a plurality of applications, the method further comprising:
allocating, by an operating system, the plurality of applications to a plurality of cores according to the priority attributes of the plurality of software-defined processing domains.

### Claim 18

A system, comprising:
a plurality of processing cores; and
a memory coupled to at least one of the plurality of processing cores, wherein the memory has program instructions stored thereon that, upon execution by one or more of the processing cores, cause the system to execute a hypervisor to:
access domain information in a master device, the domain information comprising a plurality of domain identifiers and a plurality of priority levels, each of the domain identifiers and priority levels associated with a respective one of a plurality of virtual machines; and
allocate each of the plurality of virtual machines to a respective one of the plurality of processing cores according to the priority levels.

### Claim 19 (depends on 18)

The system of claim 18, further comprising:
a domain access controller coupled to an interconnect; and
a plurality of resources connected to the domain access controller via the interconnect, wherein:
(a) the hypervisor is configured to provide the domain identifiers to the domain access controller, wherein the domain access controller is coupled to the interconnect between the hypervisor and the plurality of resources; and
(b) the domain access controller comprises at least one message queue for one or more of the plurality of resources, wherein the domain access controller is configured to:
determine whether domain identifiers in messages from the virtual machines match domain identifiers of any of the one or more resources; and
allow the messages to pass to the at least one message queue in response to the domain identifiers matching domain identifiers of any of the one or more resources.

### Claim 20 (depends on 19)

The system of claim 19, wherein the domain access controller is further configured to:
determine a priority level associated with each of the allowed messages;
determine an order for the allowed messages according to associated priority levels; and
provide the allowed messages to the resource in the determined order.