# US 2024/0201762 A1 · Ruler-follower dynamic voltage and frequency scaling schemes for integrated circuit components > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2024/0201762 A1 - Document ID: US20240201762A1 - Status: Published application - Kind: A1 - Application number: 18/082,518 - Filed: 2022-12-15 - Published: 2024-06-20 - Earliest claimed: 2022-12-15 - Assignees: QUALCOMM Incorporated - Applicants: QUALCOMM Incorporated - Inventors: Aravind BHASKARA; Zhurang ZHAO; Kiran BHAGWAT; Michael TIPTON; Joshua STUBBS; Jyotirmoy DAS; Thomas TANG - Web page: https://patentgrep.com/patent/US20240201762A1 ## CPC - G06F 1/26: Power supply means, e.g. regulation thereof (for memories G11C) - G06F 1/3296: by lowering the supply or operating voltage - G06F 1/08: Clock generators with changeable or programmable clock frequency - G06F 1/28: Supervision thereof, e.g. detecting power-supply failure by out of limits supervision - G06F 1/324: by lowering clock frequency - G06F 1/3243: {Power saving in microcontroller unit} - G06F 1/329: by task scheduling - G06F 1/3203: Power management, i.e. event-based initiation of a power-saving mode - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract Various dynamic voltage and frequency scaling (DVFS) techniques can optimize the high voltage residency of a device containing multiple processing cores that share a voltage rail. The DVFS techniques described herein can reduce the high voltage residency (duration) of the voltage rail by aligning the high frequency duration of multiple cores sharing the same voltage rail. ## Claims ### Claim 1 An apparatus for dynamic voltage and frequency scaling, comprising: a plurality of processing cores; and a dynamic voltage and frequency scaling (DVFS) resource manager coupled to the plurality of processing cores, wherein the DVFS resource manager is configured to: adjust a DVFS parameter of a first processing core of the apparatus based on a request of the first processing core; adjust a second DVFS parameter of a second processing core of the apparatus that shares a voltage rail with the first processing core, based on a first mapping rule between the first DVFS parameter and the second DVFS parameter; and adjust a voltage of the voltage rail to enable the first processing core to operate using the first DVFS parameter and the second processing core to operate using the second DVFS parameter. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein, to adjust the voltage of the voltage rail, the DVFS resource manager is further configured to: set the voltage rail to a minimum level sufficient to enable the first processing core to operate using the first DVFS parameter and the second processing core to operate using the second DVFS parameter. ### Claim 3 (depends on 1) The apparatus of claim 1, wherein the DVFS resource manager is further configured to: adjust a third DVFS parameter of a third processing core of the apparatus based on a second mapping rule between the first DVFS parameter and the third DVFS parameter, the third processing core configured to share the voltage rail with the first processing core and the second processing core; and adjust the voltage of the voltage rail to enable the first processing core to operate using the first DVFS parameter, the second processing core to operate using the second DVFS parameter, and the third processing core to operate using the third DVFS parameter. ### Claim 4 (depends on 1) The apparatus of claim 1, wherein the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency, and the DVFS resource manager is further configured to: increase the second clocking frequency to follow an increase of the first clocking frequency based on the first mapping rule. ### Claim 5 (depends on 1) The apparatus of claim 1, wherein the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency, and the DVFS resource manager is further configured to: increase the second clocking frequency to a frequency higher than that indicated by the first mapping rule. ### Claim 6 (depends on 1) The apparatus of claim 1, wherein the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency, and the DVFS resource manager is further configured to: increase the second clocking frequency to follow an increase of the first clocking frequency up to a frequency threshold; and maintain the second clocking frequency at the frequency threshold irrespective of further increase of the first clocking frequency. ### Claim 7 (depends on 1) The apparatus of claim 1, wherein the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency, and the DVFS resource manager is further configured to: decrease the second clocking frequency to follow a decrease of the first clocking frequency based on the first mapping rule. ### Claim 8 (depends on 1) The apparatus of claim 1, wherein: the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency; and the first mapping rule comprises a plurality of first values of the first clocking frequency, each of the first values being mapped to a corresponding second value of the second clocking frequency. ### Claim 9 (depends on 1) The apparatus of claim 1, wherein: the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency; and the first mapping rule comprises a plurality of first values of the first clocking frequency, two or more of the first values being mapped to a same second value of the second clocking frequency. ### Claim 10 (depends on 1) The apparatus of claim 1, wherein the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency, and the DVFS resource manager is further configured to: adjust the second clocking frequency subject to at least one of a power rail current constraint or a bandwidth constraint of the apparatus. ### Claim 11 (depends on 1) The apparatus of claim 1, wherein each of the first DVFS parameter and the second DVFS parameter comprises at least one of a clocking frequency and a rail voltage. ### Claim 12 A method of dynamic voltage and frequency scaling (DVFS) at an apparatus, comprising: adjusting a first DVFS parameter of a first processing core of the apparatus based on a request of the first processing core; adjusting a second DVFS parameter of a second processing core of the apparatus that shares a voltage rail with the first processing core, based on a first mapping rule between the first DVFS parameter and the second DVFS parameter; and adjusting a voltage of the voltage rail to enable the first processing core to operate using the first DVFS parameter and the second processing core to operate using the second DVFS parameter. ### Claim 13 (depends on 12) The method of claim 12, wherein the adjusting the voltage of the voltage rail comprises: setting the voltage rail to a minimum level sufficient to enable the first processing core to operate using the first DVFS parameter and the second processing core to operate using the second DVFS parameter. ### Claim 14 (depends on 12) The method of claim 12, further comprising: adjusting a third DVFS parameter of a third processing core of the apparatus based on a second mapping rule between the first DVFS parameter and the third DVFS parameter, the third processing core configured to share the voltage rail with the first processing core and the second processing core; and adjusting the voltage of the voltage rail to enable the first processing core to operate using the first DVFS parameter, the second processing core to operate at the second DVFS parameter, and the third processing core to operate at the third DVFS parameter. ### Claim 15 (depends on 12) The method of claim 12, wherein the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency, and the method further comprises: increasing the second clocking frequency to follow an increase of the first clocking frequency based on the first mapping rule. ### Claim 16 (depends on 12) The method of claim 12, wherein the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency, and the method further comprises: increasing the second clocking frequency to a frequency higher than that indicated by the first mapping rule. ### Claim 17 (depends on 12) The method of claim 12, wherein the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency, and the method further comprises: increasing the second clocking frequency to follow an increase of the first clocking frequency up to a frequency threshold; and maintaining the second clocking frequency at the frequency threshold irrespective of further increase of the first clocking frequency. ### Claim 18 (depends on 12) The method of claim 12, wherein the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency, and the method further comprises: decreasing the second clocking frequency to follow a decrease of the first clocking frequency based on the first mapping rule. ### Claim 19 (depends on 12) The method of claim 12, wherein: the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency; and the first mapping rule comprises a plurality of first values of the first clocking frequency, each of the first values being mapped to a corresponding second value of the second clocking frequency. ### Claim 20 (depends on 12) The method of claim 12, wherein: the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency; and the first mapping rule comprises a plurality of first values of the first clocking frequency, two or more of the first values being mapped to a same second value of the second clocking frequency. ### Claim 21 (depends on 12) The method of claim 12, wherein the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency, and the method further comprises: adjusting the second clocking frequency subject to at least one of a power rail current constraint or a bandwidth constraint of the apparatus. ### Claim 22 An apparatus for dynamic voltage and frequency scaling (DVFS), comprising: means for adjusting a first DVFS parameter of a first processing core of the apparatus based on a request of the first processing core; means for adjusting a second DVFS parameter of a second processing core of the apparatus that shares a voltage rail with the first processing core, based on a first mapping rule between the first DVFS parameter and the second DVFS parameter; and means for adjusting a voltage of the voltage rail to enable the first processing core to operate using the first DVFS parameter and the second processing core to operate using the second DVFS parameter. ### Claim 23 (depends on 22) The apparatus of claim 22, further comprising: means for setting the voltage rail to a minimum level sufficient to enable the first processing core to operate using the first DVFS parameter and the second processing core to operate using the second DVFS parameter. ### Claim 24 (depends on 22) The apparatus of claim 22, wherein the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency, and the apparatus further comprises: means for increasing the second clocking frequency to follow an increase of the first clocking frequency based on the first mapping rule. ### Claim 25 (depends on 22) The apparatus of claim 22, wherein the first DVFS parameter comprises a first clocking frequency and the second DVFS parameter comprises a second clocking frequency, and the apparatus further comprises: means for increasing the second clocking frequency to a frequency higher than that indicated by the first mapping rule.